025-bcma_backport.patch 9.1 KB

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  1. --- a/drivers/bcma/bcma_private.h
  2. +++ b/drivers/bcma/bcma_private.h
  3. @@ -22,6 +22,7 @@ struct bcma_bus;
  4. /* main.c */
  5. bool bcma_wait_value(struct bcma_device *core, u16 reg, u32 mask, u32 value,
  6. int timeout);
  7. +void bcma_prepare_core(struct bcma_bus *bus, struct bcma_device *core);
  8. int bcma_bus_register(struct bcma_bus *bus);
  9. void bcma_bus_unregister(struct bcma_bus *bus);
  10. int __init bcma_bus_early_register(struct bcma_bus *bus,
  11. --- a/drivers/bcma/driver_chipcommon.c
  12. +++ b/drivers/bcma/driver_chipcommon.c
  13. @@ -339,7 +339,7 @@ void bcma_chipco_serial_init(struct bcma
  14. return;
  15. }
  16. - irq = bcma_core_irq(cc->core);
  17. + irq = bcma_core_irq(cc->core, 0);
  18. /* Determine the registers of the UARTs */
  19. cc->nr_serial_ports = (cc->capabilities & BCMA_CC_CAP_NRUART);
  20. --- a/drivers/bcma/driver_gpio.c
  21. +++ b/drivers/bcma/driver_gpio.c
  22. @@ -152,7 +152,7 @@ static int bcma_gpio_irq_domain_init(str
  23. handle_simple_irq);
  24. }
  25. - hwirq = bcma_core_irq(cc->core);
  26. + hwirq = bcma_core_irq(cc->core, 0);
  27. err = request_irq(hwirq, bcma_gpio_irq_handler, IRQF_SHARED, "gpio",
  28. cc);
  29. if (err)
  30. @@ -183,7 +183,7 @@ static void bcma_gpio_irq_domain_exit(st
  31. return;
  32. bcma_cc_mask32(cc, BCMA_CC_IRQMASK, ~BCMA_CC_IRQ_GPIO);
  33. - free_irq(bcma_core_irq(cc->core), cc);
  34. + free_irq(bcma_core_irq(cc->core, 0), cc);
  35. for (gpio = 0; gpio < chip->ngpio; gpio++) {
  36. int irq = irq_find_mapping(cc->irq_domain, gpio);
  37. --- a/drivers/bcma/driver_mips.c
  38. +++ b/drivers/bcma/driver_mips.c
  39. @@ -115,7 +115,7 @@ static u32 bcma_core_mips_irqflag(struct
  40. * If disabled, 5 is returned.
  41. * If not supported, 6 is returned.
  42. */
  43. -static unsigned int bcma_core_mips_irq(struct bcma_device *dev)
  44. +unsigned int bcma_core_mips_irq(struct bcma_device *dev)
  45. {
  46. struct bcma_device *mdev = dev->bus->drv_mips.core;
  47. u32 irqflag;
  48. @@ -133,13 +133,6 @@ static unsigned int bcma_core_mips_irq(s
  49. return 5;
  50. }
  51. -unsigned int bcma_core_irq(struct bcma_device *dev)
  52. -{
  53. - unsigned int mips_irq = bcma_core_mips_irq(dev);
  54. - return mips_irq <= 4 ? mips_irq + 2 : 0;
  55. -}
  56. -EXPORT_SYMBOL(bcma_core_irq);
  57. -
  58. static void bcma_core_mips_set_irq(struct bcma_device *dev, unsigned int irq)
  59. {
  60. unsigned int oldirq = bcma_core_mips_irq(dev);
  61. @@ -423,7 +416,7 @@ void bcma_core_mips_init(struct bcma_drv
  62. break;
  63. default:
  64. list_for_each_entry(core, &bus->cores, list) {
  65. - core->irq = bcma_core_irq(core);
  66. + core->irq = bcma_core_irq(core, 0);
  67. }
  68. bcma_err(bus,
  69. "Unknown device (0x%x) found, can not configure IRQs\n",
  70. --- a/drivers/bcma/driver_pci_host.c
  71. +++ b/drivers/bcma/driver_pci_host.c
  72. @@ -593,7 +593,7 @@ int bcma_core_pci_plat_dev_init(struct p
  73. pr_info("PCI: Fixing up device %s\n", pci_name(dev));
  74. /* Fix up interrupt lines */
  75. - dev->irq = bcma_core_irq(pc_host->pdev->core);
  76. + dev->irq = bcma_core_irq(pc_host->pdev->core, 0);
  77. pci_write_config_byte(dev, PCI_INTERRUPT_LINE, dev->irq);
  78. readrq = pcie_get_readrq(dev);
  79. @@ -617,6 +617,6 @@ int bcma_core_pci_pcibios_map_irq(const
  80. pc_host = container_of(dev->bus->ops, struct bcma_drv_pci_host,
  81. pci_ops);
  82. - return bcma_core_irq(pc_host->pdev->core);
  83. + return bcma_core_irq(pc_host->pdev->core, 0);
  84. }
  85. EXPORT_SYMBOL(bcma_core_pci_pcibios_map_irq);
  86. --- a/drivers/bcma/main.c
  87. +++ b/drivers/bcma/main.c
  88. @@ -11,6 +11,7 @@
  89. #include <linux/bcma/bcma.h>
  90. #include <linux/slab.h>
  91. #include <linux/of_address.h>
  92. +#include <linux/of_irq.h>
  93. MODULE_DESCRIPTION("Broadcom's specific AMBA driver");
  94. MODULE_LICENSE("GPL");
  95. @@ -153,6 +154,46 @@ static struct device_node *bcma_of_find_
  96. return NULL;
  97. }
  98. +static int bcma_of_irq_parse(struct platform_device *parent,
  99. + struct bcma_device *core,
  100. + struct of_phandle_args *out_irq, int num)
  101. +{
  102. + __be32 laddr[1];
  103. + int rc;
  104. +
  105. + if (core->dev.of_node) {
  106. + rc = of_irq_parse_one(core->dev.of_node, num, out_irq);
  107. + if (!rc)
  108. + return rc;
  109. + }
  110. +
  111. + out_irq->np = parent->dev.of_node;
  112. + out_irq->args_count = 1;
  113. + out_irq->args[0] = num;
  114. +
  115. + laddr[0] = cpu_to_be32(core->addr);
  116. + return of_irq_parse_raw(laddr, out_irq);
  117. +}
  118. +
  119. +static unsigned int bcma_of_get_irq(struct platform_device *parent,
  120. + struct bcma_device *core, int num)
  121. +{
  122. + struct of_phandle_args out_irq;
  123. + int ret;
  124. +
  125. + if (!parent || !parent->dev.of_node)
  126. + return 0;
  127. +
  128. + ret = bcma_of_irq_parse(parent, core, &out_irq, num);
  129. + if (ret) {
  130. + bcma_debug(core->bus, "bcma_of_get_irq() failed with rc=%d\n",
  131. + ret);
  132. + return 0;
  133. + }
  134. +
  135. + return irq_create_of_mapping(&out_irq);
  136. +}
  137. +
  138. static void bcma_of_fill_device(struct platform_device *parent,
  139. struct bcma_device *core)
  140. {
  141. @@ -161,18 +202,47 @@ static void bcma_of_fill_device(struct p
  142. node = bcma_of_find_child_device(parent, core);
  143. if (node)
  144. core->dev.of_node = node;
  145. +
  146. + core->irq = bcma_of_get_irq(parent, core, 0);
  147. }
  148. #else
  149. static void bcma_of_fill_device(struct platform_device *parent,
  150. struct bcma_device *core)
  151. {
  152. }
  153. +static inline unsigned int bcma_of_get_irq(struct platform_device *parent,
  154. + struct bcma_device *core, int num)
  155. +{
  156. + return 0;
  157. +}
  158. #endif /* CONFIG_OF */
  159. -static void bcma_register_core(struct bcma_bus *bus, struct bcma_device *core)
  160. +unsigned int bcma_core_irq(struct bcma_device *core, int num)
  161. {
  162. - int err;
  163. + struct bcma_bus *bus = core->bus;
  164. + unsigned int mips_irq;
  165. +
  166. + switch (bus->hosttype) {
  167. + case BCMA_HOSTTYPE_PCI:
  168. + return bus->host_pci->irq;
  169. + case BCMA_HOSTTYPE_SOC:
  170. + if (bus->drv_mips.core && num == 0) {
  171. + mips_irq = bcma_core_mips_irq(core);
  172. + return mips_irq <= 4 ? mips_irq + 2 : 0;
  173. + }
  174. + if (bus->host_pdev)
  175. + return bcma_of_get_irq(bus->host_pdev, core, num);
  176. + return 0;
  177. + case BCMA_HOSTTYPE_SDIO:
  178. + return 0;
  179. + }
  180. + return 0;
  181. +}
  182. +EXPORT_SYMBOL(bcma_core_irq);
  183. +
  184. +void bcma_prepare_core(struct bcma_bus *bus, struct bcma_device *core)
  185. +{
  186. core->dev.release = bcma_release_core_dev;
  187. core->dev.bus = &bcma_bus_type;
  188. dev_set_name(&core->dev, "bcma%d:%d", bus->num, core->core_index);
  189. @@ -196,6 +266,11 @@ static void bcma_register_core(struct bc
  190. case BCMA_HOSTTYPE_SDIO:
  191. break;
  192. }
  193. +}
  194. +
  195. +static void bcma_register_core(struct bcma_bus *bus, struct bcma_device *core)
  196. +{
  197. + int err;
  198. err = device_register(&core->dev);
  199. if (err) {
  200. --- a/drivers/bcma/scan.c
  201. +++ b/drivers/bcma/scan.c
  202. @@ -505,6 +505,7 @@ int bcma_bus_scan(struct bcma_bus *bus)
  203. bus->nr_cores++;
  204. other_core = bcma_find_core_reverse(bus, core->id.id);
  205. core->core_unit = (other_core == NULL) ? 0 : other_core->core_unit + 1;
  206. + bcma_prepare_core(bus, core);
  207. bcma_info(bus, "Core %d found: %s (manuf 0x%03X, id 0x%03X, rev 0x%02X, class 0x%X)\n",
  208. core->core_index, bcma_device_name(&core->id),
  209. --- a/include/linux/bcma/bcma.h
  210. +++ b/include/linux/bcma/bcma.h
  211. @@ -448,4 +448,6 @@ extern u32 bcma_chipco_pll_read(struct b
  212. #define BCMA_DMA_TRANSLATION_DMA64_CMT 0x80000000 /* Client Mode Translation for 64-bit DMA */
  213. extern u32 bcma_core_dma_translation(struct bcma_device *core);
  214. +extern unsigned int bcma_core_irq(struct bcma_device *core, int num);
  215. +
  216. #endif /* LINUX_BCMA_H_ */
  217. --- a/include/linux/bcma/bcma_driver_mips.h
  218. +++ b/include/linux/bcma/bcma_driver_mips.h
  219. @@ -43,12 +43,12 @@ struct bcma_drv_mips {
  220. extern void bcma_core_mips_init(struct bcma_drv_mips *mcore);
  221. extern void bcma_core_mips_early_init(struct bcma_drv_mips *mcore);
  222. -extern unsigned int bcma_core_irq(struct bcma_device *core);
  223. +extern unsigned int bcma_core_mips_irq(struct bcma_device *dev);
  224. #else
  225. static inline void bcma_core_mips_init(struct bcma_drv_mips *mcore) { }
  226. static inline void bcma_core_mips_early_init(struct bcma_drv_mips *mcore) { }
  227. -static inline unsigned int bcma_core_irq(struct bcma_device *core)
  228. +static inline unsigned int bcma_core_mips_irq(struct bcma_device *dev)
  229. {
  230. return 0;
  231. }
  232. --- a/Documentation/devicetree/bindings/bus/bcma.txt
  233. +++ b/Documentation/devicetree/bindings/bus/bcma.txt
  234. @@ -8,6 +8,11 @@ Required properties:
  235. The cores on the AXI bus are automatically detected by bcma with the
  236. memory ranges they are using and they get registered afterwards.
  237. +Automatic detection of the IRQ number is not working on
  238. +BCM47xx/BCM53xx ARM SoCs. To assign IRQ numbers to the cores, provide
  239. +them manually through device tree. Use an interrupt-map to specify the
  240. +IRQ used by the devices on the bus. The first address is just an index,
  241. +because we do not have any special register.
  242. The top-level axi bus may contain children representing attached cores
  243. (devices). This is needed since some hardware details can't be auto
  244. @@ -22,6 +27,22 @@ Example:
  245. ranges = <0x00000000 0x18000000 0x00100000>;
  246. #address-cells = <1>;
  247. #size-cells = <1>;
  248. + #interrupt-cells = <1>;
  249. + interrupt-map-mask = <0x000fffff 0xffff>;
  250. + interrupt-map =
  251. + /* Ethernet Controller 0 */
  252. + <0x00024000 0 &gic GIC_SPI 147 IRQ_TYPE_LEVEL_HIGH>,
  253. +
  254. + /* Ethernet Controller 1 */
  255. + <0x00025000 0 &gic GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>;
  256. +
  257. + /* PCIe Controller 0 */
  258. + <0x00012000 0 &gic GIC_SPI 126 IRQ_TYPE_LEVEL_HIGH>,
  259. + <0x00012000 1 &gic GIC_SPI 127 IRQ_TYPE_LEVEL_HIGH>,
  260. + <0x00012000 2 &gic GIC_SPI 128 IRQ_TYPE_LEVEL_HIGH>,
  261. + <0x00012000 3 &gic GIC_SPI 129 IRQ_TYPE_LEVEL_HIGH>,
  262. + <0x00012000 4 &gic GIC_SPI 130 IRQ_TYPE_LEVEL_HIGH>,
  263. + <0x00012000 5 &gic GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH>;
  264. chipcommon {
  265. reg = <0x00000000 0x1000>;