FRITZ3370.dts 5.5 KB

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  1. /dts-v1/;
  2. #include "vr9.dtsi"
  3. #include <dt-bindings/input/input.h>
  4. / {
  5. model = "FRITZ3370 - Fritz!Box WLAN 3370";
  6. chosen {
  7. bootargs = "console=ttyLTQ0,115200 ubi.mtd=1,512 root=/dev/mtdblock9";
  8. };
  9. aliases {
  10. led-boot = &power_green;
  11. led-failsafe = &power_red;
  12. led-running = &power_green;
  13. led-dsl = &dsl;
  14. led-internet = &info_green;
  15. led-wifi = &wifi;
  16. };
  17. memory@0 {
  18. reg = <0x0 0x8000000>;
  19. };
  20. fpi@10000000 {
  21. localbus@0 {
  22. nand-parts@0 {
  23. compatible = "gen_nand", "lantiq,nand-xway";
  24. bank-width = <2>;
  25. reg = <1 0x0 0x2000000>;
  26. #address-cells = <1>;
  27. #size-cells = <1>;
  28. partitions {
  29. compatible = "fixed-partitions";
  30. #address-cells = <1>;
  31. #size-cells = <1>;
  32. partition@0 {
  33. label = "kernel";
  34. reg = <0x0 0x400000>;
  35. };
  36. partition@400000 {
  37. label = "rootfs_ubi";
  38. reg = <0x400000 0x3000000>;
  39. };
  40. partition@3400000 {
  41. label = "vr9_firmware";
  42. reg = <0x3400000 0x400000>;
  43. };
  44. partition@3800000 {
  45. label = "reserved";
  46. reg = <0x3800000 0x3000000>;
  47. };
  48. partition@6800000 {
  49. label = "config";
  50. reg = <0x6800000 0x200000>;
  51. };
  52. partition@6a00000 {
  53. label = "nand-filesystem";
  54. reg = <0x6a00000 0x1600000>;
  55. };
  56. };
  57. };
  58. };
  59. gpio: pinmux@E100B10 {
  60. pinctrl-names = "default";
  61. pinctrl-0 = <&state_default>;
  62. state_default: pinmux {
  63. mdio {
  64. lantiq,groups = "mdio";
  65. lantiq,function = "mdio";
  66. };
  67. nand {
  68. lantiq,groups = "nand cle", "nand ale",
  69. "nand rd", "nand cs1", "nand rdy";
  70. lantiq,function = "ebu";
  71. lantiq,pull = <1>;
  72. };
  73. phy-rst {
  74. lantiq,pins = "io37", "io44";
  75. lantiq,pull = <0>;
  76. lantiq,open-drain = <0>;
  77. lantiq,output = <1>;
  78. };
  79. pcie-rst {
  80. lantiq,pins = "io38";
  81. lantiq,pull = <0>;
  82. lantiq,output = <1>;
  83. };
  84. };
  85. pins_spi_default: pins_spi_default {
  86. spi_in {
  87. lantiq,groups = "spi_di";
  88. lantiq,function = "spi";
  89. };
  90. spi_out {
  91. lantiq,groups = "spi_do", "spi_clk",
  92. "spi_cs4";
  93. lantiq,function = "spi";
  94. lantiq,output = <1>;
  95. };
  96. };
  97. };
  98. ifxhcd@E101000 {
  99. status = "okay";
  100. gpios = <&gpio 5 GPIO_ACTIVE_HIGH
  101. &gpio 14 GPIO_ACTIVE_HIGH>;
  102. lantiq,portmask = <0x3>;
  103. };
  104. };
  105. gphy-xrx200 {
  106. compatible = "lantiq,phy-xrx200";
  107. firmware = "lantiq/vr9_phy11g_a1x.bin";
  108. phys = [ 00 01 ];
  109. };
  110. gpio-keys-polled {
  111. compatible = "gpio-keys-polled";
  112. #address-cells = <1>;
  113. #size-cells = <0>;
  114. poll-interval = <100>;
  115. power {
  116. label = "power";
  117. gpios = <&gpio 1 GPIO_ACTIVE_HIGH>;
  118. linux,code = <KEY_POWER>;
  119. };
  120. /* wifi {
  121. label = "wifi";
  122. gpios = <&gpio 29 GPIO_ACTIVE_HIGH>;
  123. linux,code = <BTN_1>;
  124. };*/
  125. };
  126. gpio-leds {
  127. compatible = "gpio-leds";
  128. power_green: power {
  129. label = "fritz3370:green:power";
  130. gpios = <&gpio 32 GPIO_ACTIVE_LOW>;
  131. default-state = "keep";
  132. };
  133. power_red: power2 {
  134. label = "fritz3370:red:power";
  135. gpios = <&gpio 33 GPIO_ACTIVE_LOW>;
  136. };
  137. info_red {
  138. label = "fritz3370:red:info";
  139. gpios = <&gpio 34 GPIO_ACTIVE_LOW>;
  140. };
  141. wifi: wifi {
  142. label = "fritz3370:green:wlan";
  143. gpios = <&gpio 35 GPIO_ACTIVE_LOW>;
  144. };
  145. dsl: dsl {
  146. label = "fritz3370:green:dsl";
  147. gpios = <&gpio 36 GPIO_ACTIVE_LOW>;
  148. };
  149. lan {
  150. label = "fritz3370:green:lan";
  151. gpios = <&gpio 38 GPIO_ACTIVE_LOW>;
  152. };
  153. info_green: info_green {
  154. label = "fritz3370:green:info";
  155. gpios = <&gpio 47 GPIO_ACTIVE_LOW>;
  156. };
  157. };
  158. };
  159. &spi {
  160. pinctrl-names = "default";
  161. pinctrl-0 = <&pins_spi_default>;
  162. status = "ok";
  163. m25p80@4 {
  164. #address-cells = <1>;
  165. #size-cells = <1>;
  166. compatible = "jedec,spi-nor";
  167. reg = <4 0>;
  168. spi-max-frequency = <1000000>;
  169. urlader: partition@0 {
  170. reg = <0x0 0x20000>;
  171. label = "urlader";
  172. read-only;
  173. };
  174. partition@20000 {
  175. reg = <0x20000 0x10000>;
  176. label = "tffs (1)";
  177. read-only;
  178. };
  179. partition@30000 {
  180. reg = <0x30000 0x10000>;
  181. label = "tffs (2)";
  182. read-only;
  183. };
  184. };
  185. };
  186. &eth0 {
  187. lan: interface@0 {
  188. compatible = "lantiq,xrx200-pdi";
  189. #address-cells = <1>;
  190. #size-cells = <0>;
  191. reg = <0>;
  192. mtd-mac-address = <&urlader 0x987>;
  193. mtd-mac-address-increment = <(-2)>;
  194. lantiq,switch;
  195. ethernet@0 {
  196. compatible = "lantiq,xrx200-pdi-port";
  197. reg = <0>;
  198. phy-mode = "rgmii";
  199. phy-handle = <&phy0>;
  200. gpios = <&gpio 37 GPIO_ACTIVE_HIGH>;
  201. };
  202. ethernet@1 {
  203. compatible = "lantiq,xrx200-pdi-port";
  204. reg = <1>;
  205. phy-mode = "rgmii";
  206. phy-handle = <&phy1>;
  207. gpios = <&gpio 44 GPIO_ACTIVE_HIGH>;
  208. };
  209. ethernet@2 {
  210. compatible = "lantiq,xrx200-pdi-port";
  211. reg = <2>;
  212. phy-mode = "gmii";
  213. phy-handle = <&phy11>;
  214. };
  215. ethernet@3 {
  216. compatible = "lantiq,xrx200-pdi-port";
  217. reg = <4>;
  218. phy-mode = "gmii";
  219. phy-handle = <&phy13>;
  220. };
  221. };
  222. mdio@0 {
  223. #address-cells = <1>;
  224. #size-cells = <0>;
  225. compatible = "lantiq,xrx200-mdio";
  226. phy0: ethernet-phy@0 {
  227. reg = <0x0>;
  228. compatible = "lantiq,phy11g", "ethernet-phy-ieee802.3-c22";
  229. };
  230. phy1: ethernet-phy@1 {
  231. reg = <0x1>;
  232. compatible = "lantiq,phy11g", "ethernet-phy-ieee802.3-c22";
  233. };
  234. phy11: ethernet-phy@11 {
  235. reg = <0x11>;
  236. compatible = "lantiq,phy11g", "ethernet-phy-ieee802.3-c22";
  237. };
  238. phy13: ethernet-phy@13 {
  239. reg = <0x13>;
  240. compatible = "lantiq,phy11g", "ethernet-phy-ieee802.3-c22";
  241. };
  242. };
  243. };
  244. &pcie0 {
  245. pcie@0 {
  246. reg = <0 0 0 0 0>;
  247. #interrupt-cells = <1>;
  248. #size-cells = <2>;
  249. #address-cells = <3>;
  250. device_type = "pci";
  251. wifi@0,0 {
  252. compatible = "pci0,0";
  253. reg = <0 0 0 0 0>;
  254. qca,no-eeprom; /* load from ath9k-eeprom-pci-0000:01:00.0.bin */
  255. };
  256. };
  257. };