TDW89X0.dtsi 5.0 KB

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  1. #include "vr9.dtsi"
  2. #include <dt-bindings/input/input.h>
  3. / {
  4. chosen {
  5. bootargs = "console=ttyLTQ0,115200";
  6. };
  7. aliases {
  8. /* the power led can't be controlled, use the wps led instead */
  9. led-boot = &wps;
  10. led-failsafe = &wps;
  11. led-dsl = &dsl;
  12. led-internet = &internet;
  13. led-wifi = &wifi;
  14. led-usb = &usb0;
  15. led-usb2 = &usb2;
  16. };
  17. memory@0 {
  18. reg = <0x0 0x4000000>;
  19. };
  20. fpi@10000000 {
  21. gpio: pinmux@E100B10 {
  22. pinctrl-names = "default";
  23. pinctrl-0 = <&state_default>;
  24. state_default: pinmux {
  25. mdio {
  26. lantiq,groups = "mdio";
  27. lantiq,function = "mdio";
  28. };
  29. gphy-leds {
  30. lantiq,groups = "gphy0 led1", "gphy1 led1";
  31. lantiq,function = "gphy";
  32. lantiq,pull = <2>;
  33. lantiq,open-drain = <0>;
  34. lantiq,output = <1>;
  35. };
  36. phy-rst {
  37. lantiq,pins = "io42";
  38. lantiq,pull = <0>;
  39. lantiq,open-drain = <0>;
  40. lantiq,output = <1>;
  41. };
  42. pcie-rst {
  43. lantiq,pins = "io38";
  44. lantiq,pull = <0>;
  45. lantiq,output = <1>;
  46. };
  47. };
  48. pins_spi_default: pins_spi_default {
  49. spi_in {
  50. lantiq,groups = "spi_di";
  51. lantiq,function = "spi";
  52. };
  53. spi_out {
  54. lantiq,groups = "spi_do", "spi_clk",
  55. "spi_cs4";
  56. lantiq,function = "spi";
  57. lantiq,output = <1>;
  58. };
  59. };
  60. };
  61. ifxhcd@E101000 {
  62. status = "okay";
  63. gpios = <&gpio 33 GPIO_ACTIVE_HIGH>;
  64. lantiq,portmask = <0x3>;
  65. };
  66. ifxhcd@E106000 {
  67. status = "okay";
  68. gpios = <&gpio 33 GPIO_ACTIVE_HIGH>;
  69. };
  70. };
  71. gphy-xrx200 {
  72. compatible = "lantiq,phy-xrx200";
  73. firmware = "lantiq/vr9_phy11g_a2x.bin";
  74. phys = [ 00 01 ];
  75. };
  76. gpio-keys-polled {
  77. compatible = "gpio-keys-polled";
  78. #address-cells = <1>;
  79. #size-cells = <0>;
  80. poll-interval = <100>;
  81. reset {
  82. label = "reset";
  83. gpios = <&gpio 0 GPIO_ACTIVE_LOW>;
  84. linux,code = <KEY_RESTART>;
  85. };
  86. wifi {
  87. label = "wifi";
  88. gpios = <&gpio 9 GPIO_ACTIVE_HIGH>;
  89. linux,code = <KEY_RFKILL>;
  90. linux,input-type = <EV_SW>;
  91. };
  92. wps {
  93. label = "wps";
  94. gpios = <&gpio 39 GPIO_ACTIVE_LOW>;
  95. linux,code = <KEY_WPS_BUTTON>;
  96. };
  97. };
  98. gpio-leds {
  99. compatible = "gpio-leds";
  100. /*
  101. power is not controllable via gpio
  102. */
  103. dsl: dsl {
  104. label = "tdw89x0:green:dsl";
  105. gpios = <&gpio 4 GPIO_ACTIVE_HIGH>;
  106. };
  107. internet: internet {
  108. label = "tdw89x0:green:internet";
  109. gpios = <&gpio 5 GPIO_ACTIVE_HIGH>;
  110. };
  111. usb0: usb0 {
  112. label = "tdw89x0:green:usb";
  113. gpios = <&gpio 19 GPIO_ACTIVE_HIGH>;
  114. };
  115. usb2: usb2 {
  116. label = "tdw89x0:green:usb2";
  117. gpios = <&gpio 20 GPIO_ACTIVE_HIGH>;
  118. };
  119. wps: wps {
  120. label = "tdw89x0:green:wps";
  121. gpios = <&gpio 37 GPIO_ACTIVE_HIGH>;
  122. };
  123. };
  124. wifi-leds {
  125. compatible = "gpio-leds";
  126. wifi: wifi {
  127. label = "tdw89x0:green:wifi";
  128. gpios = <&ath9k 0 GPIO_ACTIVE_HIGH>;
  129. };
  130. };
  131. };
  132. &spi {
  133. pinctrl-names = "default";
  134. pinctrl-0 = <&pins_spi_default>;
  135. status = "ok";
  136. m25p80@4 {
  137. #address-cells = <1>;
  138. #size-cells = <1>;
  139. compatible = "jedec,spi-nor";
  140. reg = <4 0>;
  141. spi-max-frequency = <33250000>;
  142. m25p,fast-read;
  143. partitions {
  144. compatible = "fixed-partitions";
  145. #address-cells = <1>;
  146. #size-cells = <1>;
  147. partition@0 {
  148. reg = <0x0 0x20000>;
  149. label = "u-boot";
  150. read-only;
  151. };
  152. partition@20000 {
  153. reg = <0x20000 0x7a0000>;
  154. label = "firmware";
  155. };
  156. partition@7c0000 {
  157. reg = <0x7c0000 0x10000>;
  158. label = "config";
  159. read-only;
  160. };
  161. ath9k_cal: partition@7d0000 {
  162. reg = <0x7d0000 0x30000>;
  163. label = "boardconfig";
  164. read-only;
  165. };
  166. };
  167. };
  168. };
  169. &eth0 {
  170. lan: interface@0 {
  171. compatible = "lantiq,xrx200-pdi";
  172. #address-cells = <1>;
  173. #size-cells = <0>;
  174. reg = <0>;
  175. mtd-mac-address = <&ath9k_cal 0xf100>;
  176. lantiq,switch;
  177. ethernet@0 {
  178. compatible = "lantiq,xrx200-pdi-port";
  179. reg = <0>;
  180. phy-mode = "rgmii";
  181. phy-handle = <&phy0>;
  182. // gpios = <&gpio 42 GPIO_ACTIVE_LOW>;
  183. };
  184. ethernet@5 {
  185. compatible = "lantiq,xrx200-pdi-port";
  186. reg = <5>;
  187. phy-mode = "rgmii";
  188. phy-handle = <&phy5>;
  189. };
  190. ethernet@2 {
  191. compatible = "lantiq,xrx200-pdi-port";
  192. reg = <2>;
  193. phy-mode = "gmii";
  194. phy-handle = <&phy11>;
  195. };
  196. ethernet@3 {
  197. compatible = "lantiq,xrx200-pdi-port";
  198. reg = <4>;
  199. phy-mode = "gmii";
  200. phy-handle = <&phy13>;
  201. };
  202. };
  203. mdio@0 {
  204. #address-cells = <1>;
  205. #size-cells = <0>;
  206. compatible = "lantiq,xrx200-mdio";
  207. phy0: ethernet-phy@0 {
  208. reg = <0x0>;
  209. compatible = "lantiq,phy11g", "ethernet-phy-ieee802.3-c22";
  210. };
  211. phy5: ethernet-phy@5 {
  212. reg = <0x5>;
  213. compatible = "lantiq,phy11g", "ethernet-phy-ieee802.3-c22";
  214. };
  215. phy11: ethernet-phy@11 {
  216. reg = <0x11>;
  217. compatible = "lantiq,phy11g", "ethernet-phy-ieee802.3-c22";
  218. };
  219. phy13: ethernet-phy@13 {
  220. reg = <0x13>;
  221. compatible = "lantiq,phy11g", "ethernet-phy-ieee802.3-c22";
  222. };
  223. };
  224. };
  225. &pcie0 {
  226. pcie@0 {
  227. reg = <0 0 0 0 0>;
  228. #interrupt-cells = <1>;
  229. #size-cells = <2>;
  230. #address-cells = <3>;
  231. device_type = "pci";
  232. ath9k: wifi@168c,002e {
  233. compatible = "pci168c,002e";
  234. reg = <0 0 0 0 0>;
  235. #gpio-cells = <2>;
  236. gpio-controller;
  237. qca,no-eeprom;
  238. qca,disable-5ghz;
  239. mtd-mac-address = <&ath9k_cal 0xf100>;
  240. mtd-mac-address-increment = <2>;
  241. };
  242. };
  243. };