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- From: Marcin Wojtas <mw@semihalf.com>
- Date: Mon, 14 Mar 2016 09:38:59 +0100
- Subject: [PATCH] ARM: dts: armada-xp: add buffer manager nodes
- Armada XP network controller supports hardware buffer management (BM).
- Since it is now enabled in mvneta driver, appropriate nodes can be added
- to armada-xp.dtsi - for the actual common BM unit (bm@c0000) and its
- internal SRAM (bm-bppi), which is used for indirect access to buffer
- pointer ring residing in DRAM.
- Pools - ports mapping, bm-bppi entry in 'soc' node's ranges and optional
- parameters are supposed to be set in board files.
- Signed-off-by: Marcin Wojtas <mw@semihalf.com>
- Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
- Signed-off-by: David S. Miller <davem@davemloft.net>
- ---
- --- a/arch/arm/boot/dts/armada-xp.dtsi
- +++ b/arch/arm/boot/dts/armada-xp.dtsi
- @@ -253,6 +253,14 @@
- marvell,crypto-sram-size = <0x800>;
- };
-
- + bm: bm@c0000 {
- + compatible = "marvell,armada-380-neta-bm";
- + reg = <0xc0000 0xac>;
- + clocks = <&gateclk 13>;
- + internal-mem = <&bm_bppi>;
- + status = "disabled";
- + };
- +
- xor@f0900 {
- compatible = "marvell,orion-xor";
- reg = <0xF0900 0x100
- @@ -291,6 +299,17 @@
- #size-cells = <1>;
- ranges = <0 MBUS_ID(0x09, 0x05) 0 0x800>;
- };
- +
- + bm_bppi: bm-bppi {
- + compatible = "mmio-sram";
- + reg = <MBUS_ID(0x0c, 0x04) 0 0x100000>;
- + ranges = <0 MBUS_ID(0x0c, 0x04) 0 0x100000>;
- + #address-cells = <1>;
- + #size-cells = <1>;
- + clocks = <&gateclk 13>;
- + no-memory-wc;
- + status = "disabled";
- + };
- };
-
- clocks {
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