0074-mtd-nand-import-nand_hw_control_init.patch 5.9 KB

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  1. From d45bc58dd3bdcaabc1d7d8d9b0b8dee826635cc6 Mon Sep 17 00:00:00 2001
  2. From: Marc Gonzalez <marc_gonzalez@sigmadesigns.com>
  3. Date: Wed, 27 Jul 2016 11:23:52 +0200
  4. Subject: [PATCH] mtd: nand: import nand_hw_control_init()
  5. The code to initialize a struct nand_hw_control is duplicated across
  6. several drivers. Factorize it using an inline function.
  7. Signed-off-by: Marc Gonzalez <marc_gonzalez@sigmadesigns.com>
  8. Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
  9. ---
  10. drivers/mtd/nand/bf5xx_nand.c | 3 +--
  11. drivers/mtd/nand/brcmnand/brcmnand.c | 3 +--
  12. drivers/mtd/nand/docg4.c | 3 +--
  13. drivers/mtd/nand/fsl_elbc_nand.c | 3 +--
  14. drivers/mtd/nand/fsl_ifc_nand.c | 3 +--
  15. drivers/mtd/nand/jz4780_nand.c | 3 +--
  16. drivers/mtd/nand/nand_base.c | 3 +--
  17. drivers/mtd/nand/ndfc.c | 3 +--
  18. drivers/mtd/nand/pxa3xx_nand.c | 3 +--
  19. drivers/mtd/nand/qcom_nandc.c | 3 +--
  20. drivers/mtd/nand/s3c2410.c | 3 +--
  21. drivers/mtd/nand/sunxi_nand.c | 3 +--
  22. drivers/mtd/nand/txx9ndfmc.c | 3 +--
  23. include/linux/mtd/nand.h | 7 +++++++
  24. 14 files changed, 20 insertions(+), 26 deletions(-)
  25. --- a/drivers/mtd/nand/bf5xx_nand.c
  26. +++ b/drivers/mtd/nand/bf5xx_nand.c
  27. @@ -748,8 +748,7 @@ static int bf5xx_nand_probe(struct platf
  28. platform_set_drvdata(pdev, info);
  29. - spin_lock_init(&info->controller.lock);
  30. - init_waitqueue_head(&info->controller.wq);
  31. + nand_hw_control_init(&info->controller);
  32. info->device = &pdev->dev;
  33. info->platform = plat;
  34. --- a/drivers/mtd/nand/brcmnand/brcmnand.c
  35. +++ b/drivers/mtd/nand/brcmnand/brcmnand.c
  36. @@ -2149,8 +2149,7 @@ int brcmnand_probe(struct platform_devic
  37. init_completion(&ctrl->done);
  38. init_completion(&ctrl->dma_done);
  39. - spin_lock_init(&ctrl->controller.lock);
  40. - init_waitqueue_head(&ctrl->controller.wq);
  41. + nand_hw_control_init(&ctrl->controller);
  42. INIT_LIST_HEAD(&ctrl->host_list);
  43. /* NAND register range */
  44. --- a/drivers/mtd/nand/docg4.c
  45. +++ b/drivers/mtd/nand/docg4.c
  46. @@ -1227,8 +1227,7 @@ static void __init init_mtd_structs(stru
  47. nand->options = NAND_BUSWIDTH_16 | NAND_NO_SUBPAGE_WRITE;
  48. nand->IO_ADDR_R = nand->IO_ADDR_W = doc->virtadr + DOC_IOSPACE_DATA;
  49. nand->controller = &nand->hwcontrol;
  50. - spin_lock_init(&nand->controller->lock);
  51. - init_waitqueue_head(&nand->controller->wq);
  52. + nand_hw_control_init(nand->controller);
  53. /* methods */
  54. nand->cmdfunc = docg4_command;
  55. --- a/drivers/mtd/nand/fsl_elbc_nand.c
  56. +++ b/drivers/mtd/nand/fsl_elbc_nand.c
  57. @@ -866,8 +866,7 @@ static int fsl_elbc_nand_probe(struct pl
  58. }
  59. elbc_fcm_ctrl->counter++;
  60. - spin_lock_init(&elbc_fcm_ctrl->controller.lock);
  61. - init_waitqueue_head(&elbc_fcm_ctrl->controller.wq);
  62. + nand_hw_control_init(&elbc_fcm_ctrl->controller);
  63. fsl_lbc_ctrl_dev->nand = elbc_fcm_ctrl;
  64. } else {
  65. elbc_fcm_ctrl = fsl_lbc_ctrl_dev->nand;
  66. --- a/drivers/mtd/nand/fsl_ifc_nand.c
  67. +++ b/drivers/mtd/nand/fsl_ifc_nand.c
  68. @@ -1077,8 +1077,7 @@ static int fsl_ifc_nand_probe(struct pla
  69. ifc_nand_ctrl->addr = NULL;
  70. fsl_ifc_ctrl_dev->nand = ifc_nand_ctrl;
  71. - spin_lock_init(&ifc_nand_ctrl->controller.lock);
  72. - init_waitqueue_head(&ifc_nand_ctrl->controller.wq);
  73. + nand_hw_control_init(&ifc_nand_ctrl->controller);
  74. } else {
  75. ifc_nand_ctrl = fsl_ifc_ctrl_dev->nand;
  76. }
  77. --- a/drivers/mtd/nand/nand_base.c
  78. +++ b/drivers/mtd/nand/nand_base.c
  79. @@ -3213,8 +3213,7 @@ static void nand_set_defaults(struct nan
  80. if (!chip->controller) {
  81. chip->controller = &chip->hwcontrol;
  82. - spin_lock_init(&chip->controller->lock);
  83. - init_waitqueue_head(&chip->controller->wq);
  84. + nand_hw_control_init(chip->controller);
  85. }
  86. }
  87. --- a/drivers/mtd/nand/ndfc.c
  88. +++ b/drivers/mtd/nand/ndfc.c
  89. @@ -220,8 +220,7 @@ static int ndfc_probe(struct platform_de
  90. ndfc = &ndfc_ctrl[cs];
  91. ndfc->chip_select = cs;
  92. - spin_lock_init(&ndfc->ndfc_control.lock);
  93. - init_waitqueue_head(&ndfc->ndfc_control.wq);
  94. + nand_hw_control_init(&ndfc->ndfc_control);
  95. ndfc->ofdev = ofdev;
  96. dev_set_drvdata(&ofdev->dev, ndfc);
  97. --- a/drivers/mtd/nand/pxa3xx_nand.c
  98. +++ b/drivers/mtd/nand/pxa3xx_nand.c
  99. @@ -1739,8 +1739,7 @@ static int alloc_nand_resource(struct pl
  100. chip->cmdfunc = nand_cmdfunc;
  101. }
  102. - spin_lock_init(&chip->controller->lock);
  103. - init_waitqueue_head(&chip->controller->wq);
  104. + nand_hw_control_init(chip->controller);
  105. info->clk = devm_clk_get(&pdev->dev, NULL);
  106. if (IS_ERR(info->clk)) {
  107. dev_err(&pdev->dev, "failed to get nand clock\n");
  108. --- a/drivers/mtd/nand/s3c2410.c
  109. +++ b/drivers/mtd/nand/s3c2410.c
  110. @@ -955,8 +955,7 @@ static int s3c24xx_nand_probe(struct pla
  111. platform_set_drvdata(pdev, info);
  112. - spin_lock_init(&info->controller.lock);
  113. - init_waitqueue_head(&info->controller.wq);
  114. + nand_hw_control_init(&info->controller);
  115. /* get the clock source and enable it */
  116. --- a/drivers/mtd/nand/sunxi_nand.c
  117. +++ b/drivers/mtd/nand/sunxi_nand.c
  118. @@ -1432,8 +1432,7 @@ static int sunxi_nfc_probe(struct platfo
  119. return -ENOMEM;
  120. nfc->dev = dev;
  121. - spin_lock_init(&nfc->controller.lock);
  122. - init_waitqueue_head(&nfc->controller.wq);
  123. + nand_hw_control_init(&nfc->controller);
  124. INIT_LIST_HEAD(&nfc->chips);
  125. r = platform_get_resource(pdev, IORESOURCE_MEM, 0);
  126. --- a/drivers/mtd/nand/txx9ndfmc.c
  127. +++ b/drivers/mtd/nand/txx9ndfmc.c
  128. @@ -304,8 +304,7 @@ static int __init txx9ndfmc_probe(struct
  129. dev_info(&dev->dev, "CLK:%ldMHz HOLD:%d SPW:%d\n",
  130. (gbusclk + 500000) / 1000000, hold, spw);
  131. - spin_lock_init(&drvdata->hw_control.lock);
  132. - init_waitqueue_head(&drvdata->hw_control.wq);
  133. + nand_hw_control_init(&drvdata->hw_control);
  134. platform_set_drvdata(dev, drvdata);
  135. txx9ndfmc_initialize(dev);
  136. --- a/include/linux/mtd/nand.h
  137. +++ b/include/linux/mtd/nand.h
  138. @@ -461,6 +461,13 @@ struct nand_hw_control {
  139. wait_queue_head_t wq;
  140. };
  141. +static inline void nand_hw_control_init(struct nand_hw_control *nfc)
  142. +{
  143. + nfc->active = NULL;
  144. + spin_lock_init(&nfc->lock);
  145. + init_waitqueue_head(&nfc->wq);
  146. +}
  147. +
  148. /**
  149. * struct nand_ecc_ctrl - Control structure for ECC
  150. * @mode: ECC mode