DIR-860L-B1.dts 2.1 KB

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  1. /dts-v1/;
  2. #include "mt7621.dtsi"
  3. #include <dt-bindings/input/input.h>
  4. / {
  5. model = "D-Link DIR-860L B1";
  6. memory@0 {
  7. device_type = "memory";
  8. reg = <0x0 0x8000000>;
  9. };
  10. chosen {
  11. bootargs = "console=ttyS0,57600";
  12. };
  13. gpio-leds {
  14. compatible = "gpio-leds";
  15. power {
  16. label = "dir-860l-b1:orange:power";
  17. gpios = <&gpio0 13 1>;
  18. };
  19. power2 {
  20. label = "dir-860l-b1:green:power";
  21. gpios = <&gpio0 15 1>;
  22. };
  23. net {
  24. label = "dir-860l-b1:orange:net";
  25. gpios = <&gpio0 14 1>;
  26. };
  27. net2 {
  28. label = "dir-860l-b1:green:net";
  29. gpios = <&gpio0 16 1>;
  30. };
  31. };
  32. gpio-keys-polled {
  33. compatible = "gpio-keys-polled";
  34. #address-cells = <1>;
  35. #size-cells = <0>;
  36. poll-interval = <20>;
  37. reset {
  38. label = "reset";
  39. gpios = <&gpio0 7 1>;
  40. linux,code = <KEY_RESTART>;
  41. };
  42. wps {
  43. label = "wps";
  44. gpios = <&gpio0 18 1>;
  45. linux,code = <KEY_WPS_BUTTON>;
  46. };
  47. };
  48. };
  49. &spi0 {
  50. status = "okay";
  51. m25p80@0 {
  52. #address-cells = <1>;
  53. #size-cells = <1>;
  54. compatible = "jedec,spi-nor";
  55. reg = <0>;
  56. spi-max-frequency = <10000000>;
  57. m25p,chunked-io = <32>;
  58. partition@0 {
  59. label = "u-boot";
  60. reg = <0x0 0x30000>;
  61. read-only;
  62. };
  63. partition@30000 {
  64. label = "u-boot-env";
  65. reg = <0x30000 0x4000>;
  66. read-only;
  67. };
  68. radio: partition@34000 {
  69. label = "radio";
  70. reg = <0x34000 0x4000>;
  71. read-only;
  72. };
  73. factory: partition@38000 {
  74. label = "factory";
  75. reg = <0x38000 0x8000>;
  76. read-only;
  77. };
  78. partition@40000 {
  79. label = "defaults";
  80. reg = <0x40000 0x10000>;
  81. read-only;
  82. };
  83. partition@50000 {
  84. label = "firmware";
  85. reg = <0x50000 0xfb0000>;
  86. };
  87. };
  88. };
  89. &pcie {
  90. status = "okay";
  91. pcie0 {
  92. mt76@0,0 {
  93. reg = <0x0000 0 0 0 0>;
  94. device_type = "pci";
  95. mediatek,mtd-eeprom = <&radio 0x2000>;
  96. ieee80211-freq-limit = <5000000 6000000>;
  97. };
  98. };
  99. pcie1 {
  100. mt76@1,0 {
  101. reg = <0x0000 0 0 0 0>;
  102. device_type = "pci";
  103. mediatek,mtd-eeprom = <&radio 0>;
  104. ieee80211-freq-limit = <2400000 2500000>;
  105. };
  106. };
  107. };
  108. &pinctrl {
  109. state_default: pinctrl0 {
  110. gpio {
  111. ralink,group = "i2c", "uart2", "uart3", "rgmii2", "sdhci";
  112. ralink,function = "gpio";
  113. };
  114. };
  115. };