GL-MT750.dts 2.1 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157
  1. /dts-v1/;
  2. #include "mt7620a.dtsi"
  3. #include <dt-bindings/input/input.h>
  4. / {
  5. compatible = "GL-MT750", "ralink,mt7620a-soc";
  6. model = "GL-MT750";
  7. chosen {
  8. bootargs = "console=ttyS0,115200";
  9. };
  10. gpio-leds {
  11. compatible = "gpio-leds";
  12. wan {
  13. label = "gl-mt750:wan";
  14. gpios = <&gpio2 0 1>;
  15. };
  16. lan {
  17. label = "gl-mt750:lan";
  18. gpios = <&gpio2 1 1>;
  19. };
  20. wlan {
  21. label = "gl-mt750:wlan";
  22. gpios = <&gpio3 0 1>;
  23. };
  24. };
  25. gpio-keys-polled {
  26. compatible = "gpio-keys-polled";
  27. #address-cells = <1>;
  28. #size-cells = <0>;
  29. poll-interval = <20>;
  30. reset {
  31. label = "reset";
  32. gpios = <&gpio0 13 1>;
  33. linux,code = <KEY_RESTART>;
  34. };
  35. BTN_0 {
  36. label = "BTN_0";
  37. gpios = <&gpio2 2 1>;
  38. linux,code = <BTN_0>;
  39. };
  40. BTN_1 {
  41. label = "BTN_1";
  42. gpios = <&gpio2 3 1>;
  43. linux,code = <BTN_1>;
  44. };
  45. };
  46. };
  47. &gpio0 {
  48. status = "okay";
  49. };
  50. &gpio1 {
  51. status = "okay";
  52. };
  53. &gpio2 {
  54. status = "okay";
  55. };
  56. &gpio3 {
  57. status = "okay";
  58. };
  59. &spi0 {
  60. status = "okay";
  61. m25p80@0 {
  62. #address-cells = <1>;
  63. #size-cells = <1>;
  64. compatible = "jedec,spi-nor";
  65. reg = <0>;
  66. spi-max-frequency = <10000000>;
  67. partition@0 {
  68. label = "u-boot";
  69. reg = <0x0 0x30000>;
  70. };
  71. partition@30000 {
  72. label = "u-boot-env";
  73. reg = <0x30000 0x10000>;
  74. read-only;
  75. };
  76. factory: partition@40000 {
  77. label = "factory";
  78. reg = <0x40000 0x10000>;
  79. read-only;
  80. };
  81. partition@50000 {
  82. label = "firmware";
  83. reg = <0x50000 0xf80000>;
  84. };
  85. partition@ff0000 {
  86. label = "art";
  87. reg = <0xff0000 0x10000>;
  88. };
  89. };
  90. };
  91. &sdhci {
  92. status = "okay";
  93. };
  94. &ehci {
  95. status = "okay";
  96. };
  97. &ohci {
  98. status = "okay";
  99. };
  100. &ethernet {
  101. pinctrl-names = "default";
  102. pinctrl-0 = <&ephy_pins>;
  103. mtd-mac-address = <&factory 0x4000>;
  104. ralink,port-map = "llllw";
  105. };
  106. &wmac {
  107. ralink,mtd-eeprom = <&factory 0>;
  108. };
  109. &pcie {
  110. status = "okay";
  111. pcie-bridge {
  112. mt76@0,0 {
  113. reg = <0x0000 0 0 0 0>;
  114. device_type = "pci";
  115. mediatek,mtd-eeprom = <&factory 0x8000>;
  116. };
  117. };
  118. };
  119. &pinctrl {
  120. state_default: pinctrl0 {
  121. gpio {
  122. ralink,group = "wled","ephy","uartf";
  123. ralink,function = "gpio";
  124. };
  125. };
  126. };