MZK-750DHP.dts 1.8 KB

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  1. /dts-v1/;
  2. #include "mt7620a.dtsi"
  3. #include <dt-bindings/input/input.h>
  4. / {
  5. compatible = "ralink,mt7620a-soc";
  6. model = "Planex MZK-750DHP";
  7. gpio-leds {
  8. compatible = "gpio-leds";
  9. wps {
  10. label = "mzk-750dhp:green:wps";
  11. gpios = <&gpio2 15 1>;
  12. };
  13. power {
  14. label = "mzk-750dhp:green:power";
  15. gpios = <&gpio1 15 1>;
  16. };
  17. wlan5g {
  18. label = "mzk-750dhp:green:wlan5g";
  19. gpios = <&gpio1 14 1>;
  20. };
  21. };
  22. gpio-keys-polled {
  23. compatible = "gpio-keys-polled";
  24. #address-cells = <1>;
  25. #size-cells = <0>;
  26. poll-interval = <20>;
  27. s1 {
  28. label = "reset";
  29. gpios = <&gpio0 1 1>;
  30. linux,code = <KEY_RESTART>;
  31. };
  32. s2 {
  33. label = "wps";
  34. gpios = <&gpio2 19 1>;
  35. linux,code = <KEY_WPS_BUTTON>;
  36. };
  37. };
  38. };
  39. &gpio1 {
  40. status = "okay";
  41. };
  42. &gpio2 {
  43. status = "okay";
  44. };
  45. &spi0 {
  46. status = "okay";
  47. m25p80@0 {
  48. #address-cells = <1>;
  49. #size-cells = <1>;
  50. compatible = "jedec,spi-nor";
  51. reg = <0>;
  52. spi-max-frequency = <10000000>;
  53. partition@0 {
  54. label = "u-boot";
  55. reg = <0x0 0x30000>;
  56. read-only;
  57. };
  58. partition@30000 {
  59. label = "u-boot-env";
  60. reg = <0x30000 0x10000>;
  61. read-only;
  62. };
  63. factory: partition@40000 {
  64. label = "factory";
  65. reg = <0x40000 0x10000>;
  66. read-only;
  67. };
  68. partition@50000 {
  69. label = "firmware";
  70. reg = <0x50000 0x7b0000>;
  71. };
  72. };
  73. };
  74. &pinctrl {
  75. state_default: pinctrl0 {
  76. gpio {
  77. ralink,group = "i2c", "spi refclk", "rgmii1", "nd_sd";
  78. ralink,function = "gpio";
  79. };
  80. };
  81. };
  82. &ethernet {
  83. pinctrl-names = "default";
  84. pinctrl-0 = <&ephy_pins>;
  85. mtd-mac-address = <&factory 0x4>;
  86. mediatek,portmap = "llllw";
  87. };
  88. &gsw {
  89. mediatek,port4 = "ephy";
  90. };
  91. &wmac {
  92. ralink,mtd-eeprom = <&factory 0>;
  93. };
  94. &pcie {
  95. status = "okay";
  96. pcie-bridge {
  97. mt76@0,0 {
  98. reg = <0x0000 0 0 0 0>;
  99. device_type = "pci";
  100. mediatek,mtd-eeprom = <&factory 0x8000>;
  101. };
  102. };
  103. };