W2914NSV2.dtsi 1.6 KB

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  1. #include "mt7621.dtsi"
  2. #include <dt-bindings/gpio/gpio.h>
  3. #include <dt-bindings/input/input.h>
  4. / {
  5. chosen {
  6. bootargs = "console=ttyS0,57600";
  7. };
  8. gpio-keys-polled {
  9. compatible = "gpio-keys-polled";
  10. #address-cells = <1>;
  11. #size-cells = <0>;
  12. poll-interval = <20>;
  13. reset {
  14. label = "reset";
  15. gpios = <&gpio0 29 GPIO_ACTIVE_LOW>;
  16. linux,code = <KEY_RESTART>;
  17. };
  18. wps {
  19. label = "wps";
  20. gpios = <&gpio0 18 GPIO_ACTIVE_LOW>;
  21. linux,code = <KEY_WPS_BUTTON>;
  22. };
  23. };
  24. };
  25. &xhci {
  26. status = "okay";
  27. };
  28. &spi0 {
  29. status = "okay";
  30. m25p80@0 {
  31. #address-cells = <1>;
  32. #size-cells = <1>;
  33. compatible = "jedec,spi-nor";
  34. reg = <0>;
  35. spi-max-frequency = <10000000>;
  36. m25p,chunked-io = <32>;
  37. partition@0 {
  38. label = "u-boot";
  39. reg = <0x0 0x30000>;
  40. read-only;
  41. };
  42. partition@30000 {
  43. label = "u-boot-env";
  44. reg = <0x30000 0x10000>;
  45. read-only;
  46. };
  47. factory: partition@40000 {
  48. label = "factory";
  49. reg = <0x40000 0x10000>;
  50. read-only;
  51. };
  52. partition@50000 {
  53. label = "firmware";
  54. reg = <0x50000 0xfb0000>;
  55. };
  56. };
  57. };
  58. &pcie {
  59. status = "okay";
  60. pcie0 {
  61. wifi@14c3,7603 {
  62. compatible = "pci14c3,7603";
  63. reg = <0x0000 0 0 0 0>;
  64. mediatek,mtd-eeprom = <&factory 0x0000>;
  65. };
  66. };
  67. pcie1 {
  68. wifi@14c3,7662 {
  69. compatible = "pci14c3,7662";
  70. reg = <0x0000 0 0 0 0>;
  71. mediatek,mtd-eeprom = <&factory 0x8000>;
  72. ieee80211-freq-limit = <5000000 6000000>;
  73. };
  74. };
  75. };
  76. &ethernet {
  77. mtd-mac-address = <&factory 0xe000>;
  78. };
  79. &pinctrl {
  80. state_default: pinctrl0 {
  81. gpio {
  82. ralink,group = "wdt", "rgmii2", "jtag", "mdio";
  83. ralink,function = "gpio";
  84. };
  85. };
  86. };