Y1.dtsi 1.4 KB

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  1. #include "mt7620a.dtsi"
  2. #include <dt-bindings/input/input.h>
  3. / {
  4. chosen {
  5. bootargs = "console=ttyS0,115200";
  6. };
  7. gpio-keys-polled {
  8. compatible = "gpio-keys-polled";
  9. #address-cells = <1>;
  10. #size-cells = <0>;
  11. poll-interval = <20>;
  12. reset {
  13. label = "reset";
  14. gpios = <&gpio0 11 1>;
  15. linux,code = <KEY_RESTART>;
  16. };
  17. };
  18. };
  19. &gpio0 {
  20. status = "okay";
  21. };
  22. &gpio2 {
  23. status = "okay";
  24. };
  25. &gpio3 {
  26. status = "okay";
  27. };
  28. &spi0 {
  29. status = "okay";
  30. m25p80@0 {
  31. #address-cells = <1>;
  32. #size-cells = <1>;
  33. compatible = "jedec,spi-nor";
  34. reg = <0>;
  35. spi-max-frequency = <10000000>;
  36. partition@0 {
  37. label = "u-boot";
  38. reg = <0x0 0x30000>;
  39. read-only;
  40. };
  41. partition@30000 {
  42. label = "u-boot-env";
  43. reg = <0x30000 0x10000>;
  44. read-only;
  45. };
  46. factory: partition@40000 {
  47. label = "factory";
  48. reg = <0x40000 0x10000>;
  49. read-only;
  50. };
  51. partition@50000 {
  52. label = "firmware";
  53. reg = <0x50000 0xfb0000>;
  54. };
  55. };
  56. };
  57. &ehci {
  58. status = "okay";
  59. };
  60. &ohci {
  61. status = "okay";
  62. };
  63. &pcie {
  64. status = "okay";
  65. pcie-bridge {
  66. mt76@0,0 {
  67. reg = <0x0000 0 0 0 0>;
  68. device_type = "pci";
  69. mediatek,mtd-eeprom = <&factory 0x8000>;
  70. ieee80211-freq-limit = <5000000 6000000>;
  71. };
  72. };
  73. };
  74. &wmac {
  75. ralink,mtd-eeprom = <&factory 0>;
  76. };
  77. &pinctrl {
  78. state_default: pinctrl0 {
  79. gpio {
  80. ralink,group = "uartf", "wled", "nd_sd";
  81. ralink,function = "gpio";
  82. };
  83. pa {
  84. ralink,group = "pa";
  85. ralink,function = "pa";
  86. };
  87. };
  88. };