003_arches_sparc64.patch 4.4 KB

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  1. ---
  2. src/syscall-sparc64.h | 98 ++++++++++++++++++++++++++++++++++++++++++++++++++
  3. src/syscall.h | 2 +
  4. 2 files changed, 100 insertions(+)
  5. --- a/src/syscall.h
  6. +++ b/src/syscall.h
  7. @@ -24,6 +24,8 @@
  8. #include "syscall-alpha.h"
  9. #elif defined(__arm__)
  10. #include "syscall-arm.h"
  11. +#elif defined(__sparc__) && defined(__arch64__)
  12. +#include "syscall-sparc64.h"
  13. #elif defined(__sparc__)
  14. #include "syscall-sparc.h"
  15. #elif defined(__aarch64__)
  16. --- /dev/null
  17. +++ b/src/syscall-sparc64.h
  18. @@ -0,0 +1,98 @@
  19. +#define __NR_io_setup 268
  20. +#define __NR_io_destroy 269
  21. +#define __NR_io_submit 270
  22. +#define __NR_io_cancel 271
  23. +#define __NR_io_getevents 272
  24. +
  25. +#define io_syscall1(type,fname,sname,type1,arg1) \
  26. +type fname(type1 arg1) \
  27. +{ \
  28. + unsigned long __res; \
  29. + register unsigned long __g1 __asm__("g1") = __NR_##sname; \
  30. + register unsigned long __o0 __asm__("o0") = (unsigned long) arg1; \
  31. + __asm__ __volatile__("t 0x6d\n\t" \
  32. + "sub %%g0, %%o0, %0\n\t" \
  33. + "movcc %%xcc, %%o0, %0\n" \
  34. + "1:" \
  35. + : "=r" (__res), "=&r" (__o0) \
  36. + : "1" (__o0), "r" (__g1) \
  37. + : "cc"); \
  38. + return (type) __res; \
  39. +}
  40. +
  41. +#define io_syscall2(type,fname,sname,type1,arg1,type2,arg2) \
  42. +type fname(type1 arg1, type2 arg2) \
  43. +{ \
  44. + unsigned long __res; \
  45. + register unsigned long __g1 __asm__("g1") = __NR_##sname; \
  46. + register unsigned long __o0 __asm__("o0") = (unsigned long) arg1; \
  47. + register unsigned long __o1 __asm__("o1") = (unsigned long) arg2; \
  48. + __asm__ __volatile__("t 0x6d\n\t" \
  49. + "sub %%g0, %%o0, %0\n\t" \
  50. + "movcc %%xcc, %%o0, %0\n" \
  51. + "1:" \
  52. + : "=r" (__res), "=&r" (__o0) \
  53. + : "1" (__o0), "r" (__o1), "r" (__g1) \
  54. + : "cc"); \
  55. + return (type) __res; \
  56. +}
  57. +
  58. +#define io_syscall3(type,fname,sname,type1,arg1,type2,arg2,type3,arg3) \
  59. +type fname(type1 arg1, type2 arg2, type3 arg3) \
  60. +{ \
  61. + unsigned long __res; \
  62. + register unsigned long __g1 __asm__("g1") = __NR_##sname; \
  63. + register unsigned long __o0 __asm__("o0") = (unsigned long) arg1; \
  64. + register unsigned long __o1 __asm__("o1") = (unsigned long) arg2; \
  65. + register unsigned long __o2 __asm__("o2") = (unsigned long) arg3; \
  66. + __asm__ __volatile__("t 0x6d\n\t" \
  67. + "sub %%g0, %%o0, %0\n\t" \
  68. + "movcc %%xcc, %%o0, %0\n" \
  69. + "1:" \
  70. + : "=r" (__res), "=&r" (__o0) \
  71. + : "1" (__o0), "r" (__o1), "r" (__o2), \
  72. + "r" (__g1) \
  73. + : "cc"); \
  74. + return (type) __res; \
  75. +}
  76. +
  77. +#define io_syscall4(type,fname,sname,type1,arg1,type2,arg2,type3,arg3,type4,arg4) \
  78. +type fname(type1 arg1, type2 arg2, type3 arg3, type4 arg4) \
  79. +{ \
  80. + unsigned long __res; \
  81. + register unsigned long __g1 __asm__("g1") = __NR_##sname; \
  82. + register unsigned long __o0 __asm__("o0") = (unsigned long) arg1; \
  83. + register unsigned long __o1 __asm__("o1") = (unsigned long) arg2; \
  84. + register unsigned long __o2 __asm__("o2") = (unsigned long) arg3; \
  85. + register unsigned long __o3 __asm__("o3") = (unsigned long) arg4; \
  86. + __asm__ __volatile__("t 0x6d\n\t" \
  87. + "sub %%g0, %%o0, %0\n\t" \
  88. + "movcc %%xcc, %%o0, %0\n" \
  89. + "1:" \
  90. + : "=r" (__res), "=&r" (__o0) \
  91. + : "1" (__o0), "r" (__o1), "r" (__o2), \
  92. + "r" (__o3), "r" (__g1) \
  93. + : "cc"); \
  94. + return (type) __res; \
  95. +}
  96. +
  97. +#define io_syscall5(type,fname,sname,type1,arg1,type2,arg2,type3,arg3,type4,arg4,type5,arg5) \
  98. +type fname(type1 arg1, type2 arg2, type3 arg3, type4 arg4, type5 arg5) \
  99. +{ \
  100. + unsigned long __res; \
  101. + register unsigned long __g1 __asm__("g1") = __NR_##sname; \
  102. + register unsigned long __o0 __asm__("o0") = (unsigned long) arg1; \
  103. + register unsigned long __o1 __asm__("o1") = (unsigned long) arg2; \
  104. + register unsigned long __o2 __asm__("o2") = (unsigned long) arg3; \
  105. + register unsigned long __o3 __asm__("o3") = (unsigned long) arg4; \
  106. + register unsigned long __o4 __asm__("o4") = (unsigned long) arg5; \
  107. + __asm__ __volatile__("t 0x6d\n\t" \
  108. + "sub %%g0, %%o0, %0\n\t" \
  109. + "movcc %%xcc, %%o0, %0\n" \
  110. + "1:" \
  111. + : "=r" (__res), "=&r" (__o0) \
  112. + : "1" (__o0), "r" (__o1), "r" (__o2), \
  113. + "r" (__o3), "r" (__o4), "r" (__g1) \
  114. + : "cc"); \
  115. + return (type) __res; \
  116. +}