optiboot_pro_8MHz.lst 19 KB

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  1. optiboot_atmega168.elf: file format elf32-avr
  2. Sections:
  3. Idx Name Size VMA LMA File off Algn
  4. 0 .text 000001f0 00003e00 00003e00 00000074 2**1
  5. CONTENTS, ALLOC, LOAD, READONLY, CODE
  6. 1 .version 00000002 00003ffe 00003ffe 00000264 2**0
  7. CONTENTS, ALLOC, LOAD, DATA
  8. 2 .debug_aranges 00000028 00000000 00000000 00000266 2**0
  9. CONTENTS, READONLY, DEBUGGING
  10. 3 .debug_pubnames 00000074 00000000 00000000 0000028e 2**0
  11. CONTENTS, READONLY, DEBUGGING
  12. 4 .debug_info 000003db 00000000 00000000 00000302 2**0
  13. CONTENTS, READONLY, DEBUGGING
  14. 5 .debug_abbrev 000001ea 00000000 00000000 000006dd 2**0
  15. CONTENTS, READONLY, DEBUGGING
  16. 6 .debug_line 00000423 00000000 00000000 000008c7 2**0
  17. CONTENTS, READONLY, DEBUGGING
  18. 7 .debug_frame 00000080 00000000 00000000 00000cec 2**2
  19. CONTENTS, READONLY, DEBUGGING
  20. 8 .debug_str 00000172 00000000 00000000 00000d6c 2**0
  21. CONTENTS, READONLY, DEBUGGING
  22. 9 .debug_loc 000002d7 00000000 00000000 00000ede 2**0
  23. CONTENTS, READONLY, DEBUGGING
  24. 10 .debug_ranges 000000b8 00000000 00000000 000011b5 2**0
  25. CONTENTS, READONLY, DEBUGGING
  26. Disassembly of section .text:
  27. 00003e00 <main>:
  28. #define wdtVect (*(uint16_t*)(RAMSTART+SPM_PAGESIZE*2+6))
  29. #endif
  30. /* main program starts here */
  31. int main(void) {
  32. 3e00: 11 24 eor r1, r1
  33. #if defined(__AVR_ATmega8__) || defined (__AVR_ATmega32__)
  34. SP=RAMEND; // This is done by hardware reset
  35. #endif
  36. // Adaboot no-wait mod
  37. ch = MCUSR;
  38. 3e02: 84 b7 in r24, 0x34 ; 52
  39. MCUSR = 0;
  40. 3e04: 14 be out 0x34, r1 ; 52
  41. if (!(ch & _BV(EXTRF))) appStart(ch);
  42. 3e06: 81 fd sbrc r24, 1
  43. 3e08: 01 c0 rjmp .+2 ; 0x3e0c <main+0xc>
  44. 3e0a: ec d0 rcall .+472 ; 0x3fe4 <appStart>
  45. #if LED_START_FLASHES > 0
  46. // Set up Timer 1 for timeout counter
  47. TCCR1B = _BV(CS12) | _BV(CS10); // div 1024
  48. 3e0c: 85 e0 ldi r24, 0x05 ; 5
  49. 3e0e: 80 93 81 00 sts 0x0081, r24
  50. UCSRA = _BV(U2X); //Double speed mode USART
  51. UCSRB = _BV(RXEN) | _BV(TXEN); // enable Rx & Tx
  52. UCSRC = _BV(URSEL) | _BV(UCSZ1) | _BV(UCSZ0); // config USART; 8N1
  53. UBRRL = (uint8_t)( (F_CPU + BAUD_RATE * 4L) / (BAUD_RATE * 8L) - 1 );
  54. #else
  55. UART_SRA = _BV(U2X0); //Double speed mode USART0
  56. 3e12: 82 e0 ldi r24, 0x02 ; 2
  57. 3e14: 80 93 c0 00 sts 0x00C0, r24
  58. UART_SRB = _BV(RXEN0) | _BV(TXEN0);
  59. 3e18: 88 e1 ldi r24, 0x18 ; 24
  60. 3e1a: 80 93 c1 00 sts 0x00C1, r24
  61. UART_SRC = _BV(UCSZ00) | _BV(UCSZ01);
  62. 3e1e: 86 e0 ldi r24, 0x06 ; 6
  63. 3e20: 80 93 c2 00 sts 0x00C2, r24
  64. UART_SRL = (uint8_t)( (F_CPU + BAUD_RATE * 4L) / (BAUD_RATE * 8L) - 1 );
  65. 3e24: 88 e0 ldi r24, 0x08 ; 8
  66. 3e26: 80 93 c4 00 sts 0x00C4, r24
  67. #endif
  68. #endif
  69. // Set up watchdog to trigger after 500ms
  70. watchdogConfig(WATCHDOG_1S);
  71. 3e2a: 8e e0 ldi r24, 0x0E ; 14
  72. 3e2c: c5 d0 rcall .+394 ; 0x3fb8 <watchdogConfig>
  73. #if (LED_START_FLASHES > 0) || defined(LED_DATA_FLASH)
  74. /* Set LED pin as output */
  75. LED_DDR |= _BV(LED);
  76. 3e2e: 25 9a sbi 0x04, 5 ; 4
  77. 3e30: 86 e0 ldi r24, 0x06 ; 6
  78. }
  79. #if LED_START_FLASHES > 0
  80. void flash_led(uint8_t count) {
  81. do {
  82. TCNT1 = -(F_CPU/(1024*16));
  83. 3e32: 28 e1 ldi r18, 0x18 ; 24
  84. 3e34: 3e ef ldi r19, 0xFE ; 254
  85. TIFR1 = _BV(TOV1);
  86. 3e36: 91 e0 ldi r25, 0x01 ; 1
  87. }
  88. #if LED_START_FLASHES > 0
  89. void flash_led(uint8_t count) {
  90. do {
  91. TCNT1 = -(F_CPU/(1024*16));
  92. 3e38: 30 93 85 00 sts 0x0085, r19
  93. 3e3c: 20 93 84 00 sts 0x0084, r18
  94. TIFR1 = _BV(TOV1);
  95. 3e40: 96 bb out 0x16, r25 ; 22
  96. while(!(TIFR1 & _BV(TOV1)));
  97. 3e42: b0 9b sbis 0x16, 0 ; 22
  98. 3e44: fe cf rjmp .-4 ; 0x3e42 <main+0x42>
  99. #if defined(__AVR_ATmega8__) || defined (__AVR_ATmega32__)
  100. LED_PORT ^= _BV(LED);
  101. #else
  102. LED_PIN |= _BV(LED);
  103. 3e46: 1d 9a sbi 0x03, 5 ; 3
  104. }
  105. #endif
  106. // Watchdog functions. These are only safe with interrupts turned off.
  107. void watchdogReset() {
  108. __asm__ __volatile__ (
  109. 3e48: a8 95 wdr
  110. LED_PORT ^= _BV(LED);
  111. #else
  112. LED_PIN |= _BV(LED);
  113. #endif
  114. watchdogReset();
  115. } while (--count);
  116. 3e4a: 81 50 subi r24, 0x01 ; 1
  117. 3e4c: a9 f7 brne .-22 ; 0x3e38 <main+0x38>
  118. 3e4e: aa 24 eor r10, r10
  119. 3e50: bb 24 eor r11, r11
  120. * Start the page erase and wait for it to finish. There
  121. * used to be code to do this while receiving the data over
  122. * the serial link, but the performance improvement was slight,
  123. * and we needed the space back.
  124. */
  125. __boot_page_erase_short((uint16_t)(void*)address);
  126. 3e52: 33 e0 ldi r19, 0x03 ; 3
  127. 3e54: 83 2e mov r8, r19
  128. */
  129. do {
  130. uint16_t a;
  131. a = *bufPtr++;
  132. a |= (*bufPtr++) << 8;
  133. __boot_page_fill_short((uint16_t)(void*)addrPtr,a);
  134. 3e56: 77 24 eor r7, r7
  135. 3e58: 73 94 inc r7
  136. } while (len -= 2);
  137. /*
  138. * Actually Write the buffer to flash (and wait for it to finish.)
  139. */
  140. __boot_page_write_short((uint16_t)(void*)address);
  141. 3e5a: 25 e0 ldi r18, 0x05 ; 5
  142. 3e5c: 92 2e mov r9, r18
  143. boot_spm_busy_wait();
  144. #if defined(RWWSRE)
  145. // Reenable read access to flash
  146. boot_rww_enable();
  147. 3e5e: 91 e1 ldi r25, 0x11 ; 17
  148. 3e60: c9 2e mov r12, r25
  149. #endif
  150. /* Forever loop: exits by causing WDT reset */
  151. for (;;) {
  152. /* get character from UART */
  153. ch = getch();
  154. 3e62: 9e d0 rcall .+316 ; 0x3fa0 <getch>
  155. if(ch == STK_GET_PARAMETER) {
  156. 3e64: 81 34 cpi r24, 0x41 ; 65
  157. 3e66: 59 f4 brne .+22 ; 0x3e7e <main+0x7e>
  158. unsigned char which = getch();
  159. 3e68: 9b d0 rcall .+310 ; 0x3fa0 <getch>
  160. 3e6a: 18 2f mov r17, r24
  161. verifySpace();
  162. 3e6c: ab d0 rcall .+342 ; 0x3fc4 <verifySpace>
  163. if (which == 0x82) {
  164. 3e6e: 12 38 cpi r17, 0x82 ; 130
  165. 3e70: 21 f1 breq .+72 ; 0x3eba <main+0xba>
  166. /*
  167. * Send optiboot version as "minor SW version"
  168. */
  169. putch(OPTIBOOT_MINVER);
  170. } else if (which == 0x81) {
  171. 3e72: 11 38 cpi r17, 0x81 ; 129
  172. 3e74: 09 f4 brne .+2 ; 0x3e78 <main+0x78>
  173. 3e76: 82 c0 rjmp .+260 ; 0x3f7c <main+0x17c>
  174. } else {
  175. /*
  176. * GET PARAMETER returns a generic 0x03 reply for
  177. * other parameters - enough to keep Avrdude happy
  178. */
  179. putch(0x03);
  180. 3e78: 83 e0 ldi r24, 0x03 ; 3
  181. 3e7a: 8a d0 rcall .+276 ; 0x3f90 <putch>
  182. 3e7c: 86 c0 rjmp .+268 ; 0x3f8a <main+0x18a>
  183. }
  184. }
  185. else if(ch == STK_SET_DEVICE) {
  186. 3e7e: 82 34 cpi r24, 0x42 ; 66
  187. 3e80: 11 f4 brne .+4 ; 0x3e86 <main+0x86>
  188. // SET DEVICE is ignored
  189. getNch(20);
  190. 3e82: 84 e1 ldi r24, 0x14 ; 20
  191. 3e84: 03 c0 rjmp .+6 ; 0x3e8c <main+0x8c>
  192. }
  193. else if(ch == STK_SET_DEVICE_EXT) {
  194. 3e86: 85 34 cpi r24, 0x45 ; 69
  195. 3e88: 19 f4 brne .+6 ; 0x3e90 <main+0x90>
  196. // SET DEVICE EXT is ignored
  197. getNch(5);
  198. 3e8a: 85 e0 ldi r24, 0x05 ; 5
  199. 3e8c: a3 d0 rcall .+326 ; 0x3fd4 <getNch>
  200. 3e8e: 7d c0 rjmp .+250 ; 0x3f8a <main+0x18a>
  201. }
  202. else if(ch == STK_LOAD_ADDRESS) {
  203. 3e90: 85 35 cpi r24, 0x55 ; 85
  204. 3e92: 79 f4 brne .+30 ; 0x3eb2 <main+0xb2>
  205. // LOAD ADDRESS
  206. uint16_t newAddress;
  207. newAddress = getch();
  208. 3e94: 85 d0 rcall .+266 ; 0x3fa0 <getch>
  209. newAddress = (newAddress & 0xff) | (getch() << 8);
  210. 3e96: e8 2e mov r14, r24
  211. 3e98: ff 24 eor r15, r15
  212. 3e9a: 82 d0 rcall .+260 ; 0x3fa0 <getch>
  213. 3e9c: 08 2f mov r16, r24
  214. 3e9e: 10 e0 ldi r17, 0x00 ; 0
  215. 3ea0: 10 2f mov r17, r16
  216. 3ea2: 00 27 eor r16, r16
  217. 3ea4: 0e 29 or r16, r14
  218. 3ea6: 1f 29 or r17, r15
  219. #ifdef RAMPZ
  220. // Transfer top bit to RAMPZ
  221. RAMPZ = (newAddress & 0x8000) ? 1 : 0;
  222. #endif
  223. newAddress += newAddress; // Convert from word address to byte address
  224. 3ea8: 00 0f add r16, r16
  225. 3eaa: 11 1f adc r17, r17
  226. address = newAddress;
  227. verifySpace();
  228. 3eac: 8b d0 rcall .+278 ; 0x3fc4 <verifySpace>
  229. 3eae: 58 01 movw r10, r16
  230. 3eb0: 6c c0 rjmp .+216 ; 0x3f8a <main+0x18a>
  231. }
  232. else if(ch == STK_UNIVERSAL) {
  233. 3eb2: 86 35 cpi r24, 0x56 ; 86
  234. 3eb4: 21 f4 brne .+8 ; 0x3ebe <main+0xbe>
  235. // UNIVERSAL command is ignored
  236. getNch(4);
  237. 3eb6: 84 e0 ldi r24, 0x04 ; 4
  238. 3eb8: 8d d0 rcall .+282 ; 0x3fd4 <getNch>
  239. putch(0x00);
  240. 3eba: 80 e0 ldi r24, 0x00 ; 0
  241. 3ebc: de cf rjmp .-68 ; 0x3e7a <main+0x7a>
  242. }
  243. /* Write memory, length is big endian and is in bytes */
  244. else if(ch == STK_PROG_PAGE) {
  245. 3ebe: 84 36 cpi r24, 0x64 ; 100
  246. 3ec0: 09 f0 breq .+2 ; 0x3ec4 <main+0xc4>
  247. 3ec2: 41 c0 rjmp .+130 ; 0x3f46 <main+0x146>
  248. // PROGRAM PAGE - we support flash programming only, not EEPROM
  249. uint8_t desttype;
  250. uint8_t *bufPtr;
  251. uint16_t savelength;
  252. length = getch()<<8; /* getlen() */
  253. 3ec4: 6d d0 rcall .+218 ; 0x3fa0 <getch>
  254. 3ec6: 90 e0 ldi r25, 0x00 ; 0
  255. 3ec8: 18 2f mov r17, r24
  256. 3eca: 00 27 eor r16, r16
  257. length |= getch();
  258. 3ecc: 69 d0 rcall .+210 ; 0x3fa0 <getch>
  259. 3ece: 90 e0 ldi r25, 0x00 ; 0
  260. 3ed0: 08 2b or r16, r24
  261. 3ed2: 19 2b or r17, r25
  262. savelength = length;
  263. desttype = getch();
  264. 3ed4: 65 d0 rcall .+202 ; 0x3fa0 <getch>
  265. 3ed6: d8 2e mov r13, r24
  266. 3ed8: e8 01 movw r28, r16
  267. 3eda: e1 2c mov r14, r1
  268. 3edc: f1 e0 ldi r31, 0x01 ; 1
  269. 3ede: ff 2e mov r15, r31
  270. // read a page worth of contents
  271. bufPtr = buff;
  272. do *bufPtr++ = getch();
  273. 3ee0: 5f d0 rcall .+190 ; 0x3fa0 <getch>
  274. 3ee2: f7 01 movw r30, r14
  275. 3ee4: 81 93 st Z+, r24
  276. 3ee6: 7f 01 movw r14, r30
  277. while (--length);
  278. 3ee8: 21 97 sbiw r28, 0x01 ; 1
  279. 3eea: d1 f7 brne .-12 ; 0x3ee0 <main+0xe0>
  280. // Read command terminator, start reply
  281. verifySpace();
  282. 3eec: 6b d0 rcall .+214 ; 0x3fc4 <verifySpace>
  283. * void writebuffer(memtype, buffer, address, length)
  284. */
  285. static inline void writebuffer(int8_t memtype, uint8_t *mybuff,
  286. uint16_t address, uint16_t len)
  287. {
  288. switch (memtype) {
  289. 3eee: f5 e4 ldi r31, 0x45 ; 69
  290. 3ef0: df 16 cp r13, r31
  291. 3ef2: 09 f4 brne .+2 ; 0x3ef6 <main+0xf6>
  292. 3ef4: ff cf rjmp .-2 ; 0x3ef4 <main+0xf4>
  293. * Start the page erase and wait for it to finish. There
  294. * used to be code to do this while receiving the data over
  295. * the serial link, but the performance improvement was slight,
  296. * and we needed the space back.
  297. */
  298. __boot_page_erase_short((uint16_t)(void*)address);
  299. 3ef6: f5 01 movw r30, r10
  300. 3ef8: 87 be out 0x37, r8 ; 55
  301. 3efa: e8 95 spm
  302. boot_spm_busy_wait();
  303. 3efc: 07 b6 in r0, 0x37 ; 55
  304. 3efe: 00 fc sbrc r0, 0
  305. 3f00: fd cf rjmp .-6 ; 0x3efc <main+0xfc>
  306. 3f02: b5 01 movw r22, r10
  307. 3f04: a8 01 movw r20, r16
  308. 3f06: a0 e0 ldi r26, 0x00 ; 0
  309. 3f08: b1 e0 ldi r27, 0x01 ; 1
  310. /*
  311. * Copy data from the buffer into the flash write buffer.
  312. */
  313. do {
  314. uint16_t a;
  315. a = *bufPtr++;
  316. 3f0a: 2c 91 ld r18, X
  317. 3f0c: 30 e0 ldi r19, 0x00 ; 0
  318. a |= (*bufPtr++) << 8;
  319. 3f0e: 11 96 adiw r26, 0x01 ; 1
  320. 3f10: 8c 91 ld r24, X
  321. 3f12: 11 97 sbiw r26, 0x01 ; 1
  322. 3f14: 90 e0 ldi r25, 0x00 ; 0
  323. 3f16: 98 2f mov r25, r24
  324. 3f18: 88 27 eor r24, r24
  325. 3f1a: 82 2b or r24, r18
  326. 3f1c: 93 2b or r25, r19
  327. #define wdtVect (*(uint16_t*)(RAMSTART+SPM_PAGESIZE*2+6))
  328. #endif
  329. /* main program starts here */
  330. int main(void) {
  331. 3f1e: 12 96 adiw r26, 0x02 ; 2
  332. */
  333. do {
  334. uint16_t a;
  335. a = *bufPtr++;
  336. a |= (*bufPtr++) << 8;
  337. __boot_page_fill_short((uint16_t)(void*)addrPtr,a);
  338. 3f20: fb 01 movw r30, r22
  339. 3f22: 0c 01 movw r0, r24
  340. 3f24: 77 be out 0x37, r7 ; 55
  341. 3f26: e8 95 spm
  342. 3f28: 11 24 eor r1, r1
  343. addrPtr += 2;
  344. 3f2a: 6e 5f subi r22, 0xFE ; 254
  345. 3f2c: 7f 4f sbci r23, 0xFF ; 255
  346. } while (len -= 2);
  347. 3f2e: 42 50 subi r20, 0x02 ; 2
  348. 3f30: 50 40 sbci r21, 0x00 ; 0
  349. 3f32: 59 f7 brne .-42 ; 0x3f0a <main+0x10a>
  350. /*
  351. * Actually Write the buffer to flash (and wait for it to finish.)
  352. */
  353. __boot_page_write_short((uint16_t)(void*)address);
  354. 3f34: f5 01 movw r30, r10
  355. 3f36: 97 be out 0x37, r9 ; 55
  356. 3f38: e8 95 spm
  357. boot_spm_busy_wait();
  358. 3f3a: 07 b6 in r0, 0x37 ; 55
  359. 3f3c: 00 fc sbrc r0, 0
  360. 3f3e: fd cf rjmp .-6 ; 0x3f3a <main+0x13a>
  361. #if defined(RWWSRE)
  362. // Reenable read access to flash
  363. boot_rww_enable();
  364. 3f40: c7 be out 0x37, r12 ; 55
  365. 3f42: e8 95 spm
  366. 3f44: 22 c0 rjmp .+68 ; 0x3f8a <main+0x18a>
  367. writebuffer(desttype, buff, address, savelength);
  368. }
  369. /* Read memory block mode, length is big endian. */
  370. else if(ch == STK_READ_PAGE) {
  371. 3f46: 84 37 cpi r24, 0x74 ; 116
  372. 3f48: 91 f4 brne .+36 ; 0x3f6e <main+0x16e>
  373. uint8_t desttype;
  374. length = getch()<<8; /* getlen() */
  375. 3f4a: 2a d0 rcall .+84 ; 0x3fa0 <getch>
  376. 3f4c: 90 e0 ldi r25, 0x00 ; 0
  377. 3f4e: d8 2f mov r29, r24
  378. 3f50: cc 27 eor r28, r28
  379. length |= getch();
  380. 3f52: 26 d0 rcall .+76 ; 0x3fa0 <getch>
  381. 3f54: 90 e0 ldi r25, 0x00 ; 0
  382. 3f56: c8 2b or r28, r24
  383. 3f58: d9 2b or r29, r25
  384. desttype = getch();
  385. 3f5a: 22 d0 rcall .+68 ; 0x3fa0 <getch>
  386. verifySpace();
  387. 3f5c: 33 d0 rcall .+102 ; 0x3fc4 <verifySpace>
  388. 3f5e: 85 01 movw r16, r10
  389. __asm__ ("elpm %0,Z+\n" : "=r" (ch), "=z" (address): "1" (address));
  390. #else
  391. // read a Flash byte and increment the address
  392. __asm__ ("lpm %0,Z+\n" : "=r" (ch), "=z" (address): "1" (address));
  393. #endif
  394. putch(ch);
  395. 3f60: f8 01 movw r30, r16
  396. 3f62: 85 91 lpm r24, Z+
  397. 3f64: 8f 01 movw r16, r30
  398. 3f66: 14 d0 rcall .+40 ; 0x3f90 <putch>
  399. } while (--length);
  400. 3f68: 21 97 sbiw r28, 0x01 ; 1
  401. 3f6a: d1 f7 brne .-12 ; 0x3f60 <main+0x160>
  402. 3f6c: 0e c0 rjmp .+28 ; 0x3f8a <main+0x18a>
  403. read_mem(desttype, address, length);
  404. }
  405. /* Get device signature bytes */
  406. else if(ch == STK_READ_SIGN) {
  407. 3f6e: 85 37 cpi r24, 0x75 ; 117
  408. 3f70: 39 f4 brne .+14 ; 0x3f80 <main+0x180>
  409. // READ SIGN - return what Avrdude wants to hear
  410. verifySpace();
  411. 3f72: 28 d0 rcall .+80 ; 0x3fc4 <verifySpace>
  412. putch(SIGNATURE_0);
  413. 3f74: 8e e1 ldi r24, 0x1E ; 30
  414. 3f76: 0c d0 rcall .+24 ; 0x3f90 <putch>
  415. putch(SIGNATURE_1);
  416. 3f78: 84 e9 ldi r24, 0x94 ; 148
  417. 3f7a: 0a d0 rcall .+20 ; 0x3f90 <putch>
  418. putch(SIGNATURE_2);
  419. 3f7c: 86 e0 ldi r24, 0x06 ; 6
  420. 3f7e: 7d cf rjmp .-262 ; 0x3e7a <main+0x7a>
  421. }
  422. else if (ch == STK_LEAVE_PROGMODE) { /* 'Q' */
  423. 3f80: 81 35 cpi r24, 0x51 ; 81
  424. 3f82: 11 f4 brne .+4 ; 0x3f88 <main+0x188>
  425. // Adaboot no-wait mod
  426. watchdogConfig(WATCHDOG_16MS);
  427. 3f84: 88 e0 ldi r24, 0x08 ; 8
  428. 3f86: 18 d0 rcall .+48 ; 0x3fb8 <watchdogConfig>
  429. verifySpace();
  430. }
  431. else {
  432. // This covers the response to commands like STK_ENTER_PROGMODE
  433. verifySpace();
  434. 3f88: 1d d0 rcall .+58 ; 0x3fc4 <verifySpace>
  435. }
  436. putch(STK_OK);
  437. 3f8a: 80 e1 ldi r24, 0x10 ; 16
  438. 3f8c: 01 d0 rcall .+2 ; 0x3f90 <putch>
  439. 3f8e: 69 cf rjmp .-302 ; 0x3e62 <main+0x62>
  440. 00003f90 <putch>:
  441. }
  442. }
  443. void putch(char ch) {
  444. 3f90: 98 2f mov r25, r24
  445. #ifndef SOFT_UART
  446. while (!(UART_SRA & _BV(UDRE0)));
  447. 3f92: 80 91 c0 00 lds r24, 0x00C0
  448. 3f96: 85 ff sbrs r24, 5
  449. 3f98: fc cf rjmp .-8 ; 0x3f92 <putch+0x2>
  450. UART_UDR = ch;
  451. 3f9a: 90 93 c6 00 sts 0x00C6, r25
  452. [uartBit] "I" (UART_TX_BIT)
  453. :
  454. "r25"
  455. );
  456. #endif
  457. }
  458. 3f9e: 08 95 ret
  459. 00003fa0 <getch>:
  460. [uartBit] "I" (UART_RX_BIT)
  461. :
  462. "r25"
  463. );
  464. #else
  465. while(!(UART_SRA & _BV(RXC0)))
  466. 3fa0: 80 91 c0 00 lds r24, 0x00C0
  467. 3fa4: 87 ff sbrs r24, 7
  468. 3fa6: fc cf rjmp .-8 ; 0x3fa0 <getch>
  469. ;
  470. if (!(UART_SRA & _BV(FE0))) {
  471. 3fa8: 80 91 c0 00 lds r24, 0x00C0
  472. 3fac: 84 fd sbrc r24, 4
  473. 3fae: 01 c0 rjmp .+2 ; 0x3fb2 <getch+0x12>
  474. }
  475. #endif
  476. // Watchdog functions. These are only safe with interrupts turned off.
  477. void watchdogReset() {
  478. __asm__ __volatile__ (
  479. 3fb0: a8 95 wdr
  480. * don't care that an invalid char is returned...)
  481. */
  482. watchdogReset();
  483. }
  484. ch = UART_UDR;
  485. 3fb2: 80 91 c6 00 lds r24, 0x00C6
  486. LED_PIN |= _BV(LED);
  487. #endif
  488. #endif
  489. return ch;
  490. }
  491. 3fb6: 08 95 ret
  492. 00003fb8 <watchdogConfig>:
  493. "wdr\n"
  494. );
  495. }
  496. void watchdogConfig(uint8_t x) {
  497. WDTCSR = _BV(WDCE) | _BV(WDE);
  498. 3fb8: e0 e6 ldi r30, 0x60 ; 96
  499. 3fba: f0 e0 ldi r31, 0x00 ; 0
  500. 3fbc: 98 e1 ldi r25, 0x18 ; 24
  501. 3fbe: 90 83 st Z, r25
  502. WDTCSR = x;
  503. 3fc0: 80 83 st Z, r24
  504. }
  505. 3fc2: 08 95 ret
  506. 00003fc4 <verifySpace>:
  507. do getch(); while (--count);
  508. verifySpace();
  509. }
  510. void verifySpace() {
  511. if (getch() != CRC_EOP) {
  512. 3fc4: ed df rcall .-38 ; 0x3fa0 <getch>
  513. 3fc6: 80 32 cpi r24, 0x20 ; 32
  514. 3fc8: 19 f0 breq .+6 ; 0x3fd0 <verifySpace+0xc>
  515. watchdogConfig(WATCHDOG_16MS); // shorten WD timeout
  516. 3fca: 88 e0 ldi r24, 0x08 ; 8
  517. 3fcc: f5 df rcall .-22 ; 0x3fb8 <watchdogConfig>
  518. 3fce: ff cf rjmp .-2 ; 0x3fce <verifySpace+0xa>
  519. while (1) // and busy-loop so that WD causes
  520. ; // a reset and app start.
  521. }
  522. putch(STK_INSYNC);
  523. 3fd0: 84 e1 ldi r24, 0x14 ; 20
  524. }
  525. 3fd2: de cf rjmp .-68 ; 0x3f90 <putch>
  526. 00003fd4 <getNch>:
  527. ::[count] "M" (UART_B_VALUE)
  528. );
  529. }
  530. #endif
  531. void getNch(uint8_t count) {
  532. 3fd4: 1f 93 push r17
  533. 3fd6: 18 2f mov r17, r24
  534. do getch(); while (--count);
  535. 3fd8: e3 df rcall .-58 ; 0x3fa0 <getch>
  536. 3fda: 11 50 subi r17, 0x01 ; 1
  537. 3fdc: e9 f7 brne .-6 ; 0x3fd8 <getNch+0x4>
  538. verifySpace();
  539. 3fde: f2 df rcall .-28 ; 0x3fc4 <verifySpace>
  540. }
  541. 3fe0: 1f 91 pop r17
  542. 3fe2: 08 95 ret
  543. 00003fe4 <appStart>:
  544. void appStart(uint8_t rstFlags) {
  545. // save the reset flags in the designated register
  546. // This can be saved in a main program by putting code in .init0 (which
  547. // executes before normal c init code) to save R2 to a global variable.
  548. __asm__ __volatile__ ("mov r2, %0\n" :: "r" (rstFlags));
  549. 3fe4: 28 2e mov r2, r24
  550. watchdogConfig(WATCHDOG_OFF);
  551. 3fe6: 80 e0 ldi r24, 0x00 ; 0
  552. 3fe8: e7 df rcall .-50 ; 0x3fb8 <watchdogConfig>
  553. __asm__ __volatile__ (
  554. 3fea: ee 27 eor r30, r30
  555. 3fec: ff 27 eor r31, r31
  556. 3fee: 09 94 ijmp