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asm-eva.h

asm-eva.h 6.8 KB
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  1. /*
    2. 

  2.  * This file is subject to the terms and conditions of the GNU General Public
    3. 

  3.  * License.  See the file "COPYING" in the main directory of this archive
    4. 

  4.  * for more details.
    5. 

  5.  *
    6. 

  6.  * Copyright (C) 2014 Imagination Technologies Ltd.
    7. 

  7.  *
    8. 

  8.  */
    9. 

  9. 

  10. #ifndef __ASM_ASM_EVA_H
    11. 

  11. #define __ASM_ASM_EVA_H
    12. 

  12. 

  13. #ifndef __ASSEMBLY__
    14. 

  14. 

  15. /* Kernel variants */
    16. 

  16. 

  17. #define kernel_cache(op, base)		"cache " op ", " base "\n"
    18. 

  18. #define kernel_ll(reg, addr)		"ll " reg ", " addr "\n"
    19. 

  19. #define kernel_sc(reg, addr)		"sc " reg ", " addr "\n"
    20. 

  20. #define kernel_lw(reg, addr)		"lw " reg ", " addr "\n"
    21. 

  21. #define kernel_lwl(reg, addr)		"lwl " reg ", " addr "\n"
    22. 

  22. #define kernel_lwr(reg, addr)		"lwr " reg ", " addr "\n"
    23. 

  23. #define kernel_lh(reg, addr)		"lh " reg ", " addr "\n"
    24. 

  24. #define kernel_lb(reg, addr)		"lb " reg ", " addr "\n"
    25. 

  25. #define kernel_lbu(reg, addr)		"lbu " reg ", " addr "\n"
    26. 

  26. #define kernel_sw(reg, addr)		"sw " reg ", " addr "\n"
    27. 

  27. #define kernel_swl(reg, addr)		"swl " reg ", " addr "\n"
    28. 

  28. #define kernel_swr(reg, addr)		"swr " reg ", " addr "\n"
    29. 

  29. #define kernel_sh(reg, addr)		"sh " reg ", " addr "\n"
    30. 

  30. #define kernel_sb(reg, addr)		"sb " reg ", " addr "\n"
    31. 

  31. 

  32. #ifdef CONFIG_32BIT
    33. 

  33. /*
    34. 

  34.  * No 'sd' or 'ld' instructions in 32-bit but the code will
    35. 

  35.  * do the correct thing
    36. 

  36.  */
    37. 

  37. #define kernel_sd(reg, addr)		user_sw(reg, addr)
    38. 

  38. #define kernel_ld(reg, addr)		user_lw(reg, addr)
    39. 

  39. #else
    40. 

  40. #define kernel_sd(reg, addr)		"sd " reg", " addr "\n"
    41. 

  41. #define kernel_ld(reg, addr)		"ld " reg", " addr "\n"
    42. 

  42. #endif /* CONFIG_32BIT */
    43. 

  43. 

  44. #ifdef CONFIG_EVA
    45. 

  45. 

  46. #define __BUILD_EVA_INSN(insn, reg, addr)				\
    47. 

  47. 				"	.set	push\n"			\
    48. 

  48. 				"	.set	mips0\n"		\
    49. 

  49. 				"	.set	eva\n"			\
    50. 

  50. 				"	"insn" "reg", "addr "\n"	\
    51. 

  51. 				"	.set	pop\n"
    52. 

  52. 

  53. #define user_cache(op, base)		__BUILD_EVA_INSN("cachee", op, base)
    54. 

  54. #define user_ll(reg, addr)		__BUILD_EVA_INSN("lle", reg, addr)
    55. 

  55. #define user_sc(reg, addr)		__BUILD_EVA_INSN("sce", reg, addr)
    56. 

  56. #define user_lw(reg, addr)		__BUILD_EVA_INSN("lwe", reg, addr)
    57. 

  57. #define user_lwl(reg, addr)		__BUILD_EVA_INSN("lwle", reg, addr)
    58. 

  58. #define user_lwr(reg, addr)		__BUILD_EVA_INSN("lwre", reg, addr)
    59. 

  59. #define user_lh(reg, addr)		__BUILD_EVA_INSN("lhe", reg, addr)
    60. 

  60. #define user_lb(reg, addr)		__BUILD_EVA_INSN("lbe", reg, addr)
    61. 

  61. #define user_lbu(reg, addr)		__BUILD_EVA_INSN("lbue", reg, addr)
    62. 

  62. /* No 64-bit EVA instruction for loading double words */
    63. 

  63. #define user_ld(reg, addr)		user_lw(reg, addr)
    64. 

  64. #define user_sw(reg, addr)		__BUILD_EVA_INSN("swe", reg, addr)
    65. 

  65. #define user_swl(reg, addr)		__BUILD_EVA_INSN("swle", reg, addr)
    66. 

  66. #define user_swr(reg, addr)		__BUILD_EVA_INSN("swre", reg, addr)
    67. 

  67. #define user_sh(reg, addr)		__BUILD_EVA_INSN("she", reg, addr)
    68. 

  68. #define user_sb(reg, addr)		__BUILD_EVA_INSN("sbe", reg, addr)
    69. 

  69. /* No 64-bit EVA instruction for storing double words */
    70. 

  70. #define user_sd(reg, addr)		user_sw(reg, addr)
    71. 

  71. 

  72. #else
    73. 

  73. 

  74. #define user_cache(op, base)		kernel_cache(op, base)
    75. 

  75. #define user_ll(reg, addr)		kernel_ll(reg, addr)
    76. 

  76. #define user_sc(reg, addr)		kernel_sc(reg, addr)
    77. 

  77. #define user_lw(reg, addr)		kernel_lw(reg, addr)
    78. 

  78. #define user_lwl(reg, addr)		kernel_lwl(reg, addr)
    79. 

  79. #define user_lwr(reg, addr)		kernel_lwr(reg, addr)
    80. 

  80. #define user_lh(reg, addr)		kernel_lh(reg, addr)
    81. 

  81. #define user_lb(reg, addr)		kernel_lb(reg, addr)
    82. 

  82. #define user_lbu(reg, addr)		kernel_lbu(reg, addr)
    83. 

  83. #define user_sw(reg, addr)		kernel_sw(reg, addr)
    84. 

  84. #define user_swl(reg, addr)		kernel_swl(reg, addr)
    85. 

  85. #define user_swr(reg, addr)		kernel_swr(reg, addr)
    86. 

  86. #define user_sh(reg, addr)		kernel_sh(reg, addr)
    87. 

  87. #define user_sb(reg, addr)		kernel_sb(reg, addr)
    88. 

  88. 

  89. #ifdef CONFIG_32BIT
    90. 

  90. #define user_sd(reg, addr)		kernel_sw(reg, addr)
    91. 

  91. #define user_ld(reg, addr)		kernel_lw(reg, addr)
    92. 

  92. #else
    93. 

  93. #define user_sd(reg, addr)		kernel_sd(reg, addr)
    94. 

  94. #define user_ld(reg, addr)		kernel_ld(reg, addr)
    95. 

  95. #endif /* CONFIG_32BIT */
    96. 

  96. 

  97. #endif /* CONFIG_EVA */
    98. 

  98. 

  99. #else /* __ASSEMBLY__ */
    100. 

  100. 

  101. #define kernel_cache(op, base)		cache op, base
    102. 

  102. #define kernel_ll(reg, addr)		ll reg, addr
    103. 

  103. #define kernel_sc(reg, addr)		sc reg, addr
    104. 

  104. #define kernel_lw(reg, addr)		lw reg, addr
    105. 

  105. #define kernel_lwl(reg, addr)		lwl reg, addr
    106. 

  106. #define kernel_lwr(reg, addr)		lwr reg, addr
    107. 

  107. #define kernel_lh(reg, addr)		lh reg, addr
    108. 

  108. #define kernel_lb(reg, addr)		lb reg, addr
    109. 

  109. #define kernel_lbu(reg, addr)		lbu reg, addr
    110. 

  110. #define kernel_sw(reg, addr)		sw reg, addr
    111. 

  111. #define kernel_swl(reg, addr)		swl reg, addr
    112. 

  112. #define kernel_swr(reg, addr)		swr reg, addr
    113. 

  113. #define kernel_sh(reg, addr)		sh reg, addr
    114. 

  114. #define kernel_sb(reg, addr)		sb reg, addr
    115. 

  115. 

  116. #ifdef CONFIG_32BIT
    117. 

  117. /*
    118. 

  118.  * No 'sd' or 'ld' instructions in 32-bit but the code will
    119. 

  119.  * do the correct thing
    120. 

  120.  */
    121. 

  121. #define kernel_sd(reg, addr)		user_sw(reg, addr)
    122. 

  122. #define kernel_ld(reg, addr)		user_lw(reg, addr)
    123. 

  123. #else
    124. 

  124. #define kernel_sd(reg, addr)		sd reg, addr
    125. 

  125. #define kernel_ld(reg, addr)		ld reg, addr
    126. 

  126. #endif /* CONFIG_32BIT */
    127. 

  127. 

  128. #ifdef CONFIG_EVA
    129. 

  129. 

  130. #define __BUILD_EVA_INSN(insn, reg, addr)			\
    131. 

  131. 				.set	push;			\
    132. 

  132. 				.set	mips0;			\
    133. 

  133. 				.set	eva;			\
    134. 

  134. 				insn reg, addr;			\
    135. 

  135. 				.set	pop;
    136. 

  136. 

  137. #define user_cache(op, base)		__BUILD_EVA_INSN(cachee, op, base)
    138. 

  138. #define user_ll(reg, addr)		__BUILD_EVA_INSN(lle, reg, addr)
    139. 

  139. #define user_sc(reg, addr)		__BUILD_EVA_INSN(sce, reg, addr)
    140. 

  140. #define user_lw(reg, addr)		__BUILD_EVA_INSN(lwe, reg, addr)
    141. 

  141. #define user_lwl(reg, addr)		__BUILD_EVA_INSN(lwle, reg, addr)
    142. 

  142. #define user_lwr(reg, addr)		__BUILD_EVA_INSN(lwre, reg, addr)
    143. 

  143. #define user_lh(reg, addr)		__BUILD_EVA_INSN(lhe, reg, addr)
    144. 

  144. #define user_lb(reg, addr)		__BUILD_EVA_INSN(lbe, reg, addr)
    145. 

  145. #define user_lbu(reg, addr)		__BUILD_EVA_INSN(lbue, reg, addr)
    146. 

  146. /* No 64-bit EVA instruction for loading double words */
    147. 

  147. #define user_ld(reg, addr)		user_lw(reg, addr)
    148. 

  148. #define user_sw(reg, addr)		__BUILD_EVA_INSN(swe, reg, addr)
    149. 

  149. #define user_swl(reg, addr)		__BUILD_EVA_INSN(swle, reg, addr)
    150. 

  150. #define user_swr(reg, addr)		__BUILD_EVA_INSN(swre, reg, addr)
    151. 

  151. #define user_sh(reg, addr)		__BUILD_EVA_INSN(she, reg, addr)
    152. 

  152. #define user_sb(reg, addr)		__BUILD_EVA_INSN(sbe, reg, addr)
    153. 

  153. /* No 64-bit EVA instruction for loading double words */
    154. 

  154. #define user_sd(reg, addr)		user_sw(reg, addr)
    155. 

  155. #else
    156. 

  156. 

  157. #define user_cache(op, base)		kernel_cache(op, base)
    158. 

  158. #define user_ll(reg, addr)		kernel_ll(reg, addr)
    159. 

  159. #define user_sc(reg, addr)		kernel_sc(reg, addr)
    160. 

  160. #define user_lw(reg, addr)		kernel_lw(reg, addr)
    161. 

  161. #define user_lwl(reg, addr)		kernel_lwl(reg, addr)
    162. 

  162. #define user_lwr(reg, addr)		kernel_lwr(reg, addr)
    163. 

  163. #define user_lh(reg, addr)		kernel_lh(reg, addr)
    164. 

  164. #define user_lb(reg, addr)		kernel_lb(reg, addr)
    165. 

  165. #define user_lbu(reg, addr)		kernel_lbu(reg, addr)
    166. 

  166. #define user_sw(reg, addr)		kernel_sw(reg, addr)
    167. 

  167. #define user_swl(reg, addr)		kernel_swl(reg, addr)
    168. 

  168. #define user_swr(reg, addr)		kernel_swr(reg, addr)
    169. 

  169. #define user_sh(reg, addr)		kernel_sh(reg, addr)
    170. 

  170. #define user_sb(reg, addr)		kernel_sb(reg, addr)
    171. 

  171. 

  172. #ifdef CONFIG_32BIT
    173. 

  173. #define user_sd(reg, addr)		kernel_sw(reg, addr)
    174. 

  174. #define user_ld(reg, addr)		kernel_lw(reg, addr)
    175. 

  175. #else
    176. 

  176. #define user_sd(reg, addr)		kernel_sd(reg, addr)
    177. 

  177. #define user_ld(reg, addr)		kernel_sd(reg, addr)
    178. 

  178. #endif /* CONFIG_32BIT */
    179. 

  179. 

  180. #endif /* CONFIG_EVA */
    181. 

  181. 

  182. #endif /* __ASSEMBLY__ */
    183. 

  183. 

  184. #endif /* __ASM_ASM_EVA_H */
    185.