drm.h 27 KB

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  1. /**
  2. * \file drm.h
  3. * Header for the Direct Rendering Manager
  4. *
  5. * \author Rickard E. (Rik) Faith <faith@valinux.com>
  6. *
  7. * \par Acknowledgments:
  8. * Dec 1999, Richard Henderson <rth@twiddle.net>, move to generic \c cmpxchg.
  9. */
  10. /*
  11. * Copyright 1999 Precision Insight, Inc., Cedar Park, Texas.
  12. * Copyright 2000 VA Linux Systems, Inc., Sunnyvale, California.
  13. * All rights reserved.
  14. *
  15. * Permission is hereby granted, free of charge, to any person obtaining a
  16. * copy of this software and associated documentation files (the "Software"),
  17. * to deal in the Software without restriction, including without limitation
  18. * the rights to use, copy, modify, merge, publish, distribute, sublicense,
  19. * and/or sell copies of the Software, and to permit persons to whom the
  20. * Software is furnished to do so, subject to the following conditions:
  21. *
  22. * The above copyright notice and this permission notice (including the next
  23. * paragraph) shall be included in all copies or substantial portions of the
  24. * Software.
  25. *
  26. * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  27. * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  28. * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
  29. * VA LINUX SYSTEMS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
  30. * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
  31. * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
  32. * OTHER DEALINGS IN THE SOFTWARE.
  33. */
  34. #ifndef _DRM_H_
  35. #define _DRM_H_
  36. #if defined(__KERNEL__) || defined(__linux__)
  37. #include <linux/types.h>
  38. #include <asm/ioctl.h>
  39. typedef unsigned int drm_handle_t;
  40. #else /* One of the BSDs */
  41. #include <sys/ioccom.h>
  42. #include <sys/types.h>
  43. typedef int8_t __s8;
  44. typedef uint8_t __u8;
  45. typedef int16_t __s16;
  46. typedef uint16_t __u16;
  47. typedef int32_t __s32;
  48. typedef uint32_t __u32;
  49. typedef int64_t __s64;
  50. typedef uint64_t __u64;
  51. typedef unsigned long drm_handle_t;
  52. #endif
  53. #define DRM_NAME "drm" /**< Name in kernel, /dev, and /proc */
  54. #define DRM_MIN_ORDER 5 /**< At least 2^5 bytes = 32 bytes */
  55. #define DRM_MAX_ORDER 22 /**< Up to 2^22 bytes = 4MB */
  56. #define DRM_RAM_PERCENT 10 /**< How much system ram can we lock? */
  57. #define _DRM_LOCK_HELD 0x80000000U /**< Hardware lock is held */
  58. #define _DRM_LOCK_CONT 0x40000000U /**< Hardware lock is contended */
  59. #define _DRM_LOCK_IS_HELD(lock) ((lock) & _DRM_LOCK_HELD)
  60. #define _DRM_LOCK_IS_CONT(lock) ((lock) & _DRM_LOCK_CONT)
  61. #define _DRM_LOCKING_CONTEXT(lock) ((lock) & ~(_DRM_LOCK_HELD|_DRM_LOCK_CONT))
  62. typedef unsigned int drm_context_t;
  63. typedef unsigned int drm_drawable_t;
  64. typedef unsigned int drm_magic_t;
  65. /**
  66. * Cliprect.
  67. *
  68. * \warning: If you change this structure, make sure you change
  69. * XF86DRIClipRectRec in the server as well
  70. *
  71. * \note KW: Actually it's illegal to change either for
  72. * backwards-compatibility reasons.
  73. */
  74. struct drm_clip_rect {
  75. unsigned short x1;
  76. unsigned short y1;
  77. unsigned short x2;
  78. unsigned short y2;
  79. };
  80. /**
  81. * Drawable information.
  82. */
  83. struct drm_drawable_info {
  84. unsigned int num_rects;
  85. struct drm_clip_rect *rects;
  86. };
  87. /**
  88. * Texture region,
  89. */
  90. struct drm_tex_region {
  91. unsigned char next;
  92. unsigned char prev;
  93. unsigned char in_use;
  94. unsigned char padding;
  95. unsigned int age;
  96. };
  97. /**
  98. * Hardware lock.
  99. *
  100. * The lock structure is a simple cache-line aligned integer. To avoid
  101. * processor bus contention on a multiprocessor system, there should not be any
  102. * other data stored in the same cache line.
  103. */
  104. struct drm_hw_lock {
  105. __volatile__ unsigned int lock; /**< lock variable */
  106. char padding[60]; /**< Pad to cache line */
  107. };
  108. /**
  109. * DRM_IOCTL_VERSION ioctl argument type.
  110. *
  111. * \sa drmGetVersion().
  112. */
  113. struct drm_version {
  114. int version_major; /**< Major version */
  115. int version_minor; /**< Minor version */
  116. int version_patchlevel; /**< Patch level */
  117. size_t name_len; /**< Length of name buffer */
  118. char *name; /**< Name of driver */
  119. size_t date_len; /**< Length of date buffer */
  120. char *date; /**< User-space buffer to hold date */
  121. size_t desc_len; /**< Length of desc buffer */
  122. char *desc; /**< User-space buffer to hold desc */
  123. };
  124. /**
  125. * DRM_IOCTL_GET_UNIQUE ioctl argument type.
  126. *
  127. * \sa drmGetBusid() and drmSetBusId().
  128. */
  129. struct drm_unique {
  130. size_t unique_len; /**< Length of unique */
  131. char *unique; /**< Unique name for driver instantiation */
  132. };
  133. struct drm_list {
  134. int count; /**< Length of user-space structures */
  135. struct drm_version *version;
  136. };
  137. struct drm_block {
  138. int unused;
  139. };
  140. /**
  141. * DRM_IOCTL_CONTROL ioctl argument type.
  142. *
  143. * \sa drmCtlInstHandler() and drmCtlUninstHandler().
  144. */
  145. struct drm_control {
  146. enum {
  147. DRM_ADD_COMMAND,
  148. DRM_RM_COMMAND,
  149. DRM_INST_HANDLER,
  150. DRM_UNINST_HANDLER
  151. } func;
  152. int irq;
  153. };
  154. /**
  155. * Type of memory to map.
  156. */
  157. enum drm_map_type {
  158. _DRM_FRAME_BUFFER = 0, /**< WC (no caching), no core dump */
  159. _DRM_REGISTERS = 1, /**< no caching, no core dump */
  160. _DRM_SHM = 2, /**< shared, cached */
  161. _DRM_AGP = 3, /**< AGP/GART */
  162. _DRM_SCATTER_GATHER = 4, /**< Scatter/gather memory for PCI DMA */
  163. _DRM_CONSISTENT = 5, /**< Consistent memory for PCI DMA */
  164. };
  165. /**
  166. * Memory mapping flags.
  167. */
  168. enum drm_map_flags {
  169. _DRM_RESTRICTED = 0x01, /**< Cannot be mapped to user-virtual */
  170. _DRM_READ_ONLY = 0x02,
  171. _DRM_LOCKED = 0x04, /**< shared, cached, locked */
  172. _DRM_KERNEL = 0x08, /**< kernel requires access */
  173. _DRM_WRITE_COMBINING = 0x10, /**< use write-combining if available */
  174. _DRM_CONTAINS_LOCK = 0x20, /**< SHM page that contains lock */
  175. _DRM_REMOVABLE = 0x40, /**< Removable mapping */
  176. _DRM_DRIVER = 0x80 /**< Managed by driver */
  177. };
  178. struct drm_ctx_priv_map {
  179. unsigned int ctx_id; /**< Context requesting private mapping */
  180. void *handle; /**< Handle of map */
  181. };
  182. /**
  183. * DRM_IOCTL_GET_MAP, DRM_IOCTL_ADD_MAP and DRM_IOCTL_RM_MAP ioctls
  184. * argument type.
  185. *
  186. * \sa drmAddMap().
  187. */
  188. struct drm_map {
  189. unsigned long offset; /**< Requested physical address (0 for SAREA)*/
  190. unsigned long size; /**< Requested physical size (bytes) */
  191. enum drm_map_type type; /**< Type of memory to map */
  192. enum drm_map_flags flags; /**< Flags */
  193. void *handle; /**< User-space: "Handle" to pass to mmap() */
  194. /**< Kernel-space: kernel-virtual address */
  195. int mtrr; /**< MTRR slot used */
  196. /* Private data */
  197. };
  198. /**
  199. * DRM_IOCTL_GET_CLIENT ioctl argument type.
  200. */
  201. struct drm_client {
  202. int idx; /**< Which client desired? */
  203. int auth; /**< Is client authenticated? */
  204. unsigned long pid; /**< Process ID */
  205. unsigned long uid; /**< User ID */
  206. unsigned long magic; /**< Magic */
  207. unsigned long iocs; /**< Ioctl count */
  208. };
  209. enum drm_stat_type {
  210. _DRM_STAT_LOCK,
  211. _DRM_STAT_OPENS,
  212. _DRM_STAT_CLOSES,
  213. _DRM_STAT_IOCTLS,
  214. _DRM_STAT_LOCKS,
  215. _DRM_STAT_UNLOCKS,
  216. _DRM_STAT_VALUE, /**< Generic value */
  217. _DRM_STAT_BYTE, /**< Generic byte counter (1024bytes/K) */
  218. _DRM_STAT_COUNT, /**< Generic non-byte counter (1000/k) */
  219. _DRM_STAT_IRQ, /**< IRQ */
  220. _DRM_STAT_PRIMARY, /**< Primary DMA bytes */
  221. _DRM_STAT_SECONDARY, /**< Secondary DMA bytes */
  222. _DRM_STAT_DMA, /**< DMA */
  223. _DRM_STAT_SPECIAL, /**< Special DMA (e.g., priority or polled) */
  224. _DRM_STAT_MISSED /**< Missed DMA opportunity */
  225. /* Add to the *END* of the list */
  226. };
  227. /**
  228. * DRM_IOCTL_GET_STATS ioctl argument type.
  229. */
  230. struct drm_stats {
  231. unsigned long count;
  232. struct {
  233. unsigned long value;
  234. enum drm_stat_type type;
  235. } data[15];
  236. };
  237. /**
  238. * Hardware locking flags.
  239. */
  240. enum drm_lock_flags {
  241. _DRM_LOCK_READY = 0x01, /**< Wait until hardware is ready for DMA */
  242. _DRM_LOCK_QUIESCENT = 0x02, /**< Wait until hardware quiescent */
  243. _DRM_LOCK_FLUSH = 0x04, /**< Flush this context's DMA queue first */
  244. _DRM_LOCK_FLUSH_ALL = 0x08, /**< Flush all DMA queues first */
  245. /* These *HALT* flags aren't supported yet
  246. -- they will be used to support the
  247. full-screen DGA-like mode. */
  248. _DRM_HALT_ALL_QUEUES = 0x10, /**< Halt all current and future queues */
  249. _DRM_HALT_CUR_QUEUES = 0x20 /**< Halt all current queues */
  250. };
  251. /**
  252. * DRM_IOCTL_LOCK, DRM_IOCTL_UNLOCK and DRM_IOCTL_FINISH ioctl argument type.
  253. *
  254. * \sa drmGetLock() and drmUnlock().
  255. */
  256. struct drm_lock {
  257. int context;
  258. enum drm_lock_flags flags;
  259. };
  260. /**
  261. * DMA flags
  262. *
  263. * \warning
  264. * These values \e must match xf86drm.h.
  265. *
  266. * \sa drm_dma.
  267. */
  268. enum drm_dma_flags {
  269. /* Flags for DMA buffer dispatch */
  270. _DRM_DMA_BLOCK = 0x01, /**<
  271. * Block until buffer dispatched.
  272. *
  273. * \note The buffer may not yet have
  274. * been processed by the hardware --
  275. * getting a hardware lock with the
  276. * hardware quiescent will ensure
  277. * that the buffer has been
  278. * processed.
  279. */
  280. _DRM_DMA_WHILE_LOCKED = 0x02, /**< Dispatch while lock held */
  281. _DRM_DMA_PRIORITY = 0x04, /**< High priority dispatch */
  282. /* Flags for DMA buffer request */
  283. _DRM_DMA_WAIT = 0x10, /**< Wait for free buffers */
  284. _DRM_DMA_SMALLER_OK = 0x20, /**< Smaller-than-requested buffers OK */
  285. _DRM_DMA_LARGER_OK = 0x40 /**< Larger-than-requested buffers OK */
  286. };
  287. /**
  288. * DRM_IOCTL_ADD_BUFS and DRM_IOCTL_MARK_BUFS ioctl argument type.
  289. *
  290. * \sa drmAddBufs().
  291. */
  292. struct drm_buf_desc {
  293. int count; /**< Number of buffers of this size */
  294. int size; /**< Size in bytes */
  295. int low_mark; /**< Low water mark */
  296. int high_mark; /**< High water mark */
  297. enum {
  298. _DRM_PAGE_ALIGN = 0x01, /**< Align on page boundaries for DMA */
  299. _DRM_AGP_BUFFER = 0x02, /**< Buffer is in AGP space */
  300. _DRM_SG_BUFFER = 0x04, /**< Scatter/gather memory buffer */
  301. _DRM_FB_BUFFER = 0x08, /**< Buffer is in frame buffer */
  302. _DRM_PCI_BUFFER_RO = 0x10 /**< Map PCI DMA buffer read-only */
  303. } flags;
  304. unsigned long agp_start; /**<
  305. * Start address of where the AGP buffers are
  306. * in the AGP aperture
  307. */
  308. };
  309. /**
  310. * DRM_IOCTL_INFO_BUFS ioctl argument type.
  311. */
  312. struct drm_buf_info {
  313. int count; /**< Entries in list */
  314. struct drm_buf_desc *list;
  315. };
  316. /**
  317. * DRM_IOCTL_FREE_BUFS ioctl argument type.
  318. */
  319. struct drm_buf_free {
  320. int count;
  321. int *list;
  322. };
  323. /**
  324. * Buffer information
  325. *
  326. * \sa drm_buf_map.
  327. */
  328. struct drm_buf_pub {
  329. int idx; /**< Index into the master buffer list */
  330. int total; /**< Buffer size */
  331. int used; /**< Amount of buffer in use (for DMA) */
  332. void *address; /**< Address of buffer */
  333. };
  334. /**
  335. * DRM_IOCTL_MAP_BUFS ioctl argument type.
  336. */
  337. struct drm_buf_map {
  338. int count; /**< Length of the buffer list */
  339. void *virtual; /**< Mmap'd area in user-virtual */
  340. struct drm_buf_pub *list; /**< Buffer information */
  341. };
  342. /**
  343. * DRM_IOCTL_DMA ioctl argument type.
  344. *
  345. * Indices here refer to the offset into the buffer list in drm_buf_get.
  346. *
  347. * \sa drmDMA().
  348. */
  349. struct drm_dma {
  350. int context; /**< Context handle */
  351. int send_count; /**< Number of buffers to send */
  352. int *send_indices; /**< List of handles to buffers */
  353. int *send_sizes; /**< Lengths of data to send */
  354. enum drm_dma_flags flags; /**< Flags */
  355. int request_count; /**< Number of buffers requested */
  356. int request_size; /**< Desired size for buffers */
  357. int *request_indices; /**< Buffer information */
  358. int *request_sizes;
  359. int granted_count; /**< Number of buffers granted */
  360. };
  361. enum drm_ctx_flags {
  362. _DRM_CONTEXT_PRESERVED = 0x01,
  363. _DRM_CONTEXT_2DONLY = 0x02
  364. };
  365. /**
  366. * DRM_IOCTL_ADD_CTX ioctl argument type.
  367. *
  368. * \sa drmCreateContext() and drmDestroyContext().
  369. */
  370. struct drm_ctx {
  371. drm_context_t handle;
  372. enum drm_ctx_flags flags;
  373. };
  374. /**
  375. * DRM_IOCTL_RES_CTX ioctl argument type.
  376. */
  377. struct drm_ctx_res {
  378. int count;
  379. struct drm_ctx *contexts;
  380. };
  381. /**
  382. * DRM_IOCTL_ADD_DRAW and DRM_IOCTL_RM_DRAW ioctl argument type.
  383. */
  384. struct drm_draw {
  385. drm_drawable_t handle;
  386. };
  387. /**
  388. * DRM_IOCTL_UPDATE_DRAW ioctl argument type.
  389. */
  390. typedef enum {
  391. DRM_DRAWABLE_CLIPRECTS,
  392. } drm_drawable_info_type_t;
  393. struct drm_update_draw {
  394. drm_drawable_t handle;
  395. unsigned int type;
  396. unsigned int num;
  397. unsigned long long data;
  398. };
  399. /**
  400. * DRM_IOCTL_GET_MAGIC and DRM_IOCTL_AUTH_MAGIC ioctl argument type.
  401. */
  402. struct drm_auth {
  403. drm_magic_t magic;
  404. };
  405. /**
  406. * DRM_IOCTL_IRQ_BUSID ioctl argument type.
  407. *
  408. * \sa drmGetInterruptFromBusID().
  409. */
  410. struct drm_irq_busid {
  411. int irq; /**< IRQ number */
  412. int busnum; /**< bus number */
  413. int devnum; /**< device number */
  414. int funcnum; /**< function number */
  415. };
  416. enum drm_vblank_seq_type {
  417. _DRM_VBLANK_ABSOLUTE = 0x0, /**< Wait for specific vblank sequence number */
  418. _DRM_VBLANK_RELATIVE = 0x1, /**< Wait for given number of vblanks */
  419. /* bits 1-6 are reserved for high crtcs */
  420. _DRM_VBLANK_HIGH_CRTC_MASK = 0x0000003e,
  421. _DRM_VBLANK_EVENT = 0x4000000, /**< Send event instead of blocking */
  422. _DRM_VBLANK_FLIP = 0x8000000, /**< Scheduled buffer swap should flip */
  423. _DRM_VBLANK_NEXTONMISS = 0x10000000, /**< If missed, wait for next vblank */
  424. _DRM_VBLANK_SECONDARY = 0x20000000, /**< Secondary display controller */
  425. _DRM_VBLANK_SIGNAL = 0x40000000 /**< Send signal instead of blocking, unsupported */
  426. };
  427. #define _DRM_VBLANK_HIGH_CRTC_SHIFT 1
  428. #define _DRM_VBLANK_TYPES_MASK (_DRM_VBLANK_ABSOLUTE | _DRM_VBLANK_RELATIVE)
  429. #define _DRM_VBLANK_FLAGS_MASK (_DRM_VBLANK_EVENT | _DRM_VBLANK_SIGNAL | \
  430. _DRM_VBLANK_SECONDARY | _DRM_VBLANK_NEXTONMISS)
  431. struct drm_wait_vblank_request {
  432. enum drm_vblank_seq_type type;
  433. unsigned int sequence;
  434. unsigned long signal;
  435. };
  436. struct drm_wait_vblank_reply {
  437. enum drm_vblank_seq_type type;
  438. unsigned int sequence;
  439. long tval_sec;
  440. long tval_usec;
  441. };
  442. /**
  443. * DRM_IOCTL_WAIT_VBLANK ioctl argument type.
  444. *
  445. * \sa drmWaitVBlank().
  446. */
  447. union drm_wait_vblank {
  448. struct drm_wait_vblank_request request;
  449. struct drm_wait_vblank_reply reply;
  450. };
  451. #define _DRM_PRE_MODESET 1
  452. #define _DRM_POST_MODESET 2
  453. /**
  454. * DRM_IOCTL_MODESET_CTL ioctl argument type
  455. *
  456. * \sa drmModesetCtl().
  457. */
  458. struct drm_modeset_ctl {
  459. __u32 crtc;
  460. __u32 cmd;
  461. };
  462. /**
  463. * DRM_IOCTL_AGP_ENABLE ioctl argument type.
  464. *
  465. * \sa drmAgpEnable().
  466. */
  467. struct drm_agp_mode {
  468. unsigned long mode; /**< AGP mode */
  469. };
  470. /**
  471. * DRM_IOCTL_AGP_ALLOC and DRM_IOCTL_AGP_FREE ioctls argument type.
  472. *
  473. * \sa drmAgpAlloc() and drmAgpFree().
  474. */
  475. struct drm_agp_buffer {
  476. unsigned long size; /**< In bytes -- will round to page boundary */
  477. unsigned long handle; /**< Used for binding / unbinding */
  478. unsigned long type; /**< Type of memory to allocate */
  479. unsigned long physical; /**< Physical used by i810 */
  480. };
  481. /**
  482. * DRM_IOCTL_AGP_BIND and DRM_IOCTL_AGP_UNBIND ioctls argument type.
  483. *
  484. * \sa drmAgpBind() and drmAgpUnbind().
  485. */
  486. struct drm_agp_binding {
  487. unsigned long handle; /**< From drm_agp_buffer */
  488. unsigned long offset; /**< In bytes -- will round to page boundary */
  489. };
  490. /**
  491. * DRM_IOCTL_AGP_INFO ioctl argument type.
  492. *
  493. * \sa drmAgpVersionMajor(), drmAgpVersionMinor(), drmAgpGetMode(),
  494. * drmAgpBase(), drmAgpSize(), drmAgpMemoryUsed(), drmAgpMemoryAvail(),
  495. * drmAgpVendorId() and drmAgpDeviceId().
  496. */
  497. struct drm_agp_info {
  498. int agp_version_major;
  499. int agp_version_minor;
  500. unsigned long mode;
  501. unsigned long aperture_base; /* physical address */
  502. unsigned long aperture_size; /* bytes */
  503. unsigned long memory_allowed; /* bytes */
  504. unsigned long memory_used;
  505. /* PCI information */
  506. unsigned short id_vendor;
  507. unsigned short id_device;
  508. };
  509. /**
  510. * DRM_IOCTL_SG_ALLOC ioctl argument type.
  511. */
  512. struct drm_scatter_gather {
  513. unsigned long size; /**< In bytes -- will round to page boundary */
  514. unsigned long handle; /**< Used for mapping / unmapping */
  515. };
  516. /**
  517. * DRM_IOCTL_SET_VERSION ioctl argument type.
  518. */
  519. struct drm_set_version {
  520. int drm_di_major;
  521. int drm_di_minor;
  522. int drm_dd_major;
  523. int drm_dd_minor;
  524. };
  525. /** DRM_IOCTL_GEM_CLOSE ioctl argument type */
  526. struct drm_gem_close {
  527. /** Handle of the object to be closed. */
  528. __u32 handle;
  529. __u32 pad;
  530. };
  531. /** DRM_IOCTL_GEM_FLINK ioctl argument type */
  532. struct drm_gem_flink {
  533. /** Handle for the object being named */
  534. __u32 handle;
  535. /** Returned global name */
  536. __u32 name;
  537. };
  538. /** DRM_IOCTL_GEM_OPEN ioctl argument type */
  539. struct drm_gem_open {
  540. /** Name of object being opened */
  541. __u32 name;
  542. /** Returned handle for the object */
  543. __u32 handle;
  544. /** Returned size of the object */
  545. __u64 size;
  546. };
  547. #define DRM_CAP_DUMB_BUFFER 0x1
  548. #define DRM_CAP_VBLANK_HIGH_CRTC 0x2
  549. #define DRM_CAP_DUMB_PREFERRED_DEPTH 0x3
  550. #define DRM_CAP_DUMB_PREFER_SHADOW 0x4
  551. #define DRM_CAP_PRIME 0x5
  552. #define DRM_PRIME_CAP_IMPORT 0x1
  553. #define DRM_PRIME_CAP_EXPORT 0x2
  554. #define DRM_CAP_TIMESTAMP_MONOTONIC 0x6
  555. #define DRM_CAP_ASYNC_PAGE_FLIP 0x7
  556. /*
  557. * The CURSOR_WIDTH and CURSOR_HEIGHT capabilities return a valid widthxheight
  558. * combination for the hardware cursor. The intention is that a hardware
  559. * agnostic userspace can query a cursor plane size to use.
  560. *
  561. * Note that the cross-driver contract is to merely return a valid size;
  562. * drivers are free to attach another meaning on top, eg. i915 returns the
  563. * maximum plane size.
  564. */
  565. #define DRM_CAP_CURSOR_WIDTH 0x8
  566. #define DRM_CAP_CURSOR_HEIGHT 0x9
  567. #define DRM_CAP_ADDFB2_MODIFIERS 0x10
  568. /** DRM_IOCTL_GET_CAP ioctl argument type */
  569. struct drm_get_cap {
  570. __u64 capability;
  571. __u64 value;
  572. };
  573. /**
  574. * DRM_CLIENT_CAP_STEREO_3D
  575. *
  576. * if set to 1, the DRM core will expose the stereo 3D capabilities of the
  577. * monitor by advertising the supported 3D layouts in the flags of struct
  578. * drm_mode_modeinfo.
  579. */
  580. #define DRM_CLIENT_CAP_STEREO_3D 1
  581. /**
  582. * DRM_CLIENT_CAP_UNIVERSAL_PLANES
  583. *
  584. * If set to 1, the DRM core will expose all planes (overlay, primary, and
  585. * cursor) to userspace.
  586. */
  587. #define DRM_CLIENT_CAP_UNIVERSAL_PLANES 2
  588. /**
  589. * DRM_CLIENT_CAP_ATOMIC
  590. *
  591. * If set to 1, the DRM core will expose atomic properties to userspace
  592. */
  593. #define DRM_CLIENT_CAP_ATOMIC 3
  594. /** DRM_IOCTL_SET_CLIENT_CAP ioctl argument type */
  595. struct drm_set_client_cap {
  596. __u64 capability;
  597. __u64 value;
  598. };
  599. #define DRM_CLOEXEC O_CLOEXEC
  600. struct drm_prime_handle {
  601. __u32 handle;
  602. /** Flags.. only applicable for handle->fd */
  603. __u32 flags;
  604. /** Returned dmabuf file descriptor */
  605. __s32 fd;
  606. };
  607. #include <drm/drm_mode.h>
  608. #define DRM_IOCTL_BASE 'd'
  609. #define DRM_IO(nr) _IO(DRM_IOCTL_BASE,nr)
  610. #define DRM_IOR(nr,type) _IOR(DRM_IOCTL_BASE,nr,type)
  611. #define DRM_IOW(nr,type) _IOW(DRM_IOCTL_BASE,nr,type)
  612. #define DRM_IOWR(nr,type) _IOWR(DRM_IOCTL_BASE,nr,type)
  613. #define DRM_IOCTL_VERSION DRM_IOWR(0x00, struct drm_version)
  614. #define DRM_IOCTL_GET_UNIQUE DRM_IOWR(0x01, struct drm_unique)
  615. #define DRM_IOCTL_GET_MAGIC DRM_IOR( 0x02, struct drm_auth)
  616. #define DRM_IOCTL_IRQ_BUSID DRM_IOWR(0x03, struct drm_irq_busid)
  617. #define DRM_IOCTL_GET_MAP DRM_IOWR(0x04, struct drm_map)
  618. #define DRM_IOCTL_GET_CLIENT DRM_IOWR(0x05, struct drm_client)
  619. #define DRM_IOCTL_GET_STATS DRM_IOR( 0x06, struct drm_stats)
  620. #define DRM_IOCTL_SET_VERSION DRM_IOWR(0x07, struct drm_set_version)
  621. #define DRM_IOCTL_MODESET_CTL DRM_IOW(0x08, struct drm_modeset_ctl)
  622. #define DRM_IOCTL_GEM_CLOSE DRM_IOW (0x09, struct drm_gem_close)
  623. #define DRM_IOCTL_GEM_FLINK DRM_IOWR(0x0a, struct drm_gem_flink)
  624. #define DRM_IOCTL_GEM_OPEN DRM_IOWR(0x0b, struct drm_gem_open)
  625. #define DRM_IOCTL_GET_CAP DRM_IOWR(0x0c, struct drm_get_cap)
  626. #define DRM_IOCTL_SET_CLIENT_CAP DRM_IOW( 0x0d, struct drm_set_client_cap)
  627. #define DRM_IOCTL_SET_UNIQUE DRM_IOW( 0x10, struct drm_unique)
  628. #define DRM_IOCTL_AUTH_MAGIC DRM_IOW( 0x11, struct drm_auth)
  629. #define DRM_IOCTL_BLOCK DRM_IOWR(0x12, struct drm_block)
  630. #define DRM_IOCTL_UNBLOCK DRM_IOWR(0x13, struct drm_block)
  631. #define DRM_IOCTL_CONTROL DRM_IOW( 0x14, struct drm_control)
  632. #define DRM_IOCTL_ADD_MAP DRM_IOWR(0x15, struct drm_map)
  633. #define DRM_IOCTL_ADD_BUFS DRM_IOWR(0x16, struct drm_buf_desc)
  634. #define DRM_IOCTL_MARK_BUFS DRM_IOW( 0x17, struct drm_buf_desc)
  635. #define DRM_IOCTL_INFO_BUFS DRM_IOWR(0x18, struct drm_buf_info)
  636. #define DRM_IOCTL_MAP_BUFS DRM_IOWR(0x19, struct drm_buf_map)
  637. #define DRM_IOCTL_FREE_BUFS DRM_IOW( 0x1a, struct drm_buf_free)
  638. #define DRM_IOCTL_RM_MAP DRM_IOW( 0x1b, struct drm_map)
  639. #define DRM_IOCTL_SET_SAREA_CTX DRM_IOW( 0x1c, struct drm_ctx_priv_map)
  640. #define DRM_IOCTL_GET_SAREA_CTX DRM_IOWR(0x1d, struct drm_ctx_priv_map)
  641. #define DRM_IOCTL_SET_MASTER DRM_IO(0x1e)
  642. #define DRM_IOCTL_DROP_MASTER DRM_IO(0x1f)
  643. #define DRM_IOCTL_ADD_CTX DRM_IOWR(0x20, struct drm_ctx)
  644. #define DRM_IOCTL_RM_CTX DRM_IOWR(0x21, struct drm_ctx)
  645. #define DRM_IOCTL_MOD_CTX DRM_IOW( 0x22, struct drm_ctx)
  646. #define DRM_IOCTL_GET_CTX DRM_IOWR(0x23, struct drm_ctx)
  647. #define DRM_IOCTL_SWITCH_CTX DRM_IOW( 0x24, struct drm_ctx)
  648. #define DRM_IOCTL_NEW_CTX DRM_IOW( 0x25, struct drm_ctx)
  649. #define DRM_IOCTL_RES_CTX DRM_IOWR(0x26, struct drm_ctx_res)
  650. #define DRM_IOCTL_ADD_DRAW DRM_IOWR(0x27, struct drm_draw)
  651. #define DRM_IOCTL_RM_DRAW DRM_IOWR(0x28, struct drm_draw)
  652. #define DRM_IOCTL_DMA DRM_IOWR(0x29, struct drm_dma)
  653. #define DRM_IOCTL_LOCK DRM_IOW( 0x2a, struct drm_lock)
  654. #define DRM_IOCTL_UNLOCK DRM_IOW( 0x2b, struct drm_lock)
  655. #define DRM_IOCTL_FINISH DRM_IOW( 0x2c, struct drm_lock)
  656. #define DRM_IOCTL_PRIME_HANDLE_TO_FD DRM_IOWR(0x2d, struct drm_prime_handle)
  657. #define DRM_IOCTL_PRIME_FD_TO_HANDLE DRM_IOWR(0x2e, struct drm_prime_handle)
  658. #define DRM_IOCTL_AGP_ACQUIRE DRM_IO( 0x30)
  659. #define DRM_IOCTL_AGP_RELEASE DRM_IO( 0x31)
  660. #define DRM_IOCTL_AGP_ENABLE DRM_IOW( 0x32, struct drm_agp_mode)
  661. #define DRM_IOCTL_AGP_INFO DRM_IOR( 0x33, struct drm_agp_info)
  662. #define DRM_IOCTL_AGP_ALLOC DRM_IOWR(0x34, struct drm_agp_buffer)
  663. #define DRM_IOCTL_AGP_FREE DRM_IOW( 0x35, struct drm_agp_buffer)
  664. #define DRM_IOCTL_AGP_BIND DRM_IOW( 0x36, struct drm_agp_binding)
  665. #define DRM_IOCTL_AGP_UNBIND DRM_IOW( 0x37, struct drm_agp_binding)
  666. #define DRM_IOCTL_SG_ALLOC DRM_IOWR(0x38, struct drm_scatter_gather)
  667. #define DRM_IOCTL_SG_FREE DRM_IOW( 0x39, struct drm_scatter_gather)
  668. #define DRM_IOCTL_WAIT_VBLANK DRM_IOWR(0x3a, union drm_wait_vblank)
  669. #define DRM_IOCTL_UPDATE_DRAW DRM_IOW(0x3f, struct drm_update_draw)
  670. #define DRM_IOCTL_MODE_GETRESOURCES DRM_IOWR(0xA0, struct drm_mode_card_res)
  671. #define DRM_IOCTL_MODE_GETCRTC DRM_IOWR(0xA1, struct drm_mode_crtc)
  672. #define DRM_IOCTL_MODE_SETCRTC DRM_IOWR(0xA2, struct drm_mode_crtc)
  673. #define DRM_IOCTL_MODE_CURSOR DRM_IOWR(0xA3, struct drm_mode_cursor)
  674. #define DRM_IOCTL_MODE_GETGAMMA DRM_IOWR(0xA4, struct drm_mode_crtc_lut)
  675. #define DRM_IOCTL_MODE_SETGAMMA DRM_IOWR(0xA5, struct drm_mode_crtc_lut)
  676. #define DRM_IOCTL_MODE_GETENCODER DRM_IOWR(0xA6, struct drm_mode_get_encoder)
  677. #define DRM_IOCTL_MODE_GETCONNECTOR DRM_IOWR(0xA7, struct drm_mode_get_connector)
  678. #define DRM_IOCTL_MODE_ATTACHMODE DRM_IOWR(0xA8, struct drm_mode_mode_cmd) /* deprecated (never worked) */
  679. #define DRM_IOCTL_MODE_DETACHMODE DRM_IOWR(0xA9, struct drm_mode_mode_cmd) /* deprecated (never worked) */
  680. #define DRM_IOCTL_MODE_GETPROPERTY DRM_IOWR(0xAA, struct drm_mode_get_property)
  681. #define DRM_IOCTL_MODE_SETPROPERTY DRM_IOWR(0xAB, struct drm_mode_connector_set_property)
  682. #define DRM_IOCTL_MODE_GETPROPBLOB DRM_IOWR(0xAC, struct drm_mode_get_blob)
  683. #define DRM_IOCTL_MODE_GETFB DRM_IOWR(0xAD, struct drm_mode_fb_cmd)
  684. #define DRM_IOCTL_MODE_ADDFB DRM_IOWR(0xAE, struct drm_mode_fb_cmd)
  685. #define DRM_IOCTL_MODE_RMFB DRM_IOWR(0xAF, unsigned int)
  686. #define DRM_IOCTL_MODE_PAGE_FLIP DRM_IOWR(0xB0, struct drm_mode_crtc_page_flip)
  687. #define DRM_IOCTL_MODE_DIRTYFB DRM_IOWR(0xB1, struct drm_mode_fb_dirty_cmd)
  688. #define DRM_IOCTL_MODE_CREATE_DUMB DRM_IOWR(0xB2, struct drm_mode_create_dumb)
  689. #define DRM_IOCTL_MODE_MAP_DUMB DRM_IOWR(0xB3, struct drm_mode_map_dumb)
  690. #define DRM_IOCTL_MODE_DESTROY_DUMB DRM_IOWR(0xB4, struct drm_mode_destroy_dumb)
  691. #define DRM_IOCTL_MODE_GETPLANERESOURCES DRM_IOWR(0xB5, struct drm_mode_get_plane_res)
  692. #define DRM_IOCTL_MODE_GETPLANE DRM_IOWR(0xB6, struct drm_mode_get_plane)
  693. #define DRM_IOCTL_MODE_SETPLANE DRM_IOWR(0xB7, struct drm_mode_set_plane)
  694. #define DRM_IOCTL_MODE_ADDFB2 DRM_IOWR(0xB8, struct drm_mode_fb_cmd2)
  695. #define DRM_IOCTL_MODE_OBJ_GETPROPERTIES DRM_IOWR(0xB9, struct drm_mode_obj_get_properties)
  696. #define DRM_IOCTL_MODE_OBJ_SETPROPERTY DRM_IOWR(0xBA, struct drm_mode_obj_set_property)
  697. #define DRM_IOCTL_MODE_CURSOR2 DRM_IOWR(0xBB, struct drm_mode_cursor2)
  698. #define DRM_IOCTL_MODE_ATOMIC DRM_IOWR(0xBC, struct drm_mode_atomic)
  699. #define DRM_IOCTL_MODE_CREATEPROPBLOB DRM_IOWR(0xBD, struct drm_mode_create_blob)
  700. #define DRM_IOCTL_MODE_DESTROYPROPBLOB DRM_IOWR(0xBE, struct drm_mode_destroy_blob)
  701. /**
  702. * Device specific ioctls should only be in their respective headers
  703. * The device specific ioctl range is from 0x40 to 0x9f.
  704. * Generic IOCTLS restart at 0xA0.
  705. *
  706. * \sa drmCommandNone(), drmCommandRead(), drmCommandWrite(), and
  707. * drmCommandReadWrite().
  708. */
  709. #define DRM_COMMAND_BASE 0x40
  710. #define DRM_COMMAND_END 0xA0
  711. /**
  712. * Header for events written back to userspace on the drm fd. The
  713. * type defines the type of event, the length specifies the total
  714. * length of the event (including the header), and user_data is
  715. * typically a 64 bit value passed with the ioctl that triggered the
  716. * event. A read on the drm fd will always only return complete
  717. * events, that is, if for example the read buffer is 100 bytes, and
  718. * there are two 64 byte events pending, only one will be returned.
  719. *
  720. * Event types 0 - 0x7fffffff are generic drm events, 0x80000000 and
  721. * up are chipset specific.
  722. */
  723. struct drm_event {
  724. __u32 type;
  725. __u32 length;
  726. };
  727. #define DRM_EVENT_VBLANK 0x01
  728. #define DRM_EVENT_FLIP_COMPLETE 0x02
  729. struct drm_event_vblank {
  730. struct drm_event base;
  731. __u64 user_data;
  732. __u32 tv_sec;
  733. __u32 tv_usec;
  734. __u32 sequence;
  735. __u32 reserved;
  736. };
  737. /* typedef area */
  738. typedef struct drm_clip_rect drm_clip_rect_t;
  739. typedef struct drm_drawable_info drm_drawable_info_t;
  740. typedef struct drm_tex_region drm_tex_region_t;
  741. typedef struct drm_hw_lock drm_hw_lock_t;
  742. typedef struct drm_version drm_version_t;
  743. typedef struct drm_unique drm_unique_t;
  744. typedef struct drm_list drm_list_t;
  745. typedef struct drm_block drm_block_t;
  746. typedef struct drm_control drm_control_t;
  747. typedef enum drm_map_type drm_map_type_t;
  748. typedef enum drm_map_flags drm_map_flags_t;
  749. typedef struct drm_ctx_priv_map drm_ctx_priv_map_t;
  750. typedef struct drm_map drm_map_t;
  751. typedef struct drm_client drm_client_t;
  752. typedef enum drm_stat_type drm_stat_type_t;
  753. typedef struct drm_stats drm_stats_t;
  754. typedef enum drm_lock_flags drm_lock_flags_t;
  755. typedef struct drm_lock drm_lock_t;
  756. typedef enum drm_dma_flags drm_dma_flags_t;
  757. typedef struct drm_buf_desc drm_buf_desc_t;
  758. typedef struct drm_buf_info drm_buf_info_t;
  759. typedef struct drm_buf_free drm_buf_free_t;
  760. typedef struct drm_buf_pub drm_buf_pub_t;
  761. typedef struct drm_buf_map drm_buf_map_t;
  762. typedef struct drm_dma drm_dma_t;
  763. typedef union drm_wait_vblank drm_wait_vblank_t;
  764. typedef struct drm_agp_mode drm_agp_mode_t;
  765. typedef enum drm_ctx_flags drm_ctx_flags_t;
  766. typedef struct drm_ctx drm_ctx_t;
  767. typedef struct drm_ctx_res drm_ctx_res_t;
  768. typedef struct drm_draw drm_draw_t;
  769. typedef struct drm_update_draw drm_update_draw_t;
  770. typedef struct drm_auth drm_auth_t;
  771. typedef struct drm_irq_busid drm_irq_busid_t;
  772. typedef enum drm_vblank_seq_type drm_vblank_seq_type_t;
  773. typedef struct drm_agp_buffer drm_agp_buffer_t;
  774. typedef struct drm_agp_binding drm_agp_binding_t;
  775. typedef struct drm_agp_info drm_agp_info_t;
  776. typedef struct drm_scatter_gather drm_scatter_gather_t;
  777. typedef struct drm_set_version drm_set_version_t;
  778. #endif