r128_drm.h 9.7 KB

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  1. /* r128_drm.h -- Public header for the r128 driver -*- linux-c -*-
  2. * Created: Wed Apr 5 19:24:19 2000 by kevin@precisioninsight.com
  3. */
  4. /*
  5. * Copyright 2000 Precision Insight, Inc., Cedar Park, Texas.
  6. * Copyright 2000 VA Linux Systems, Inc., Sunnyvale, California.
  7. * All rights reserved.
  8. *
  9. * Permission is hereby granted, free of charge, to any person obtaining a
  10. * copy of this software and associated documentation files (the "Software"),
  11. * to deal in the Software without restriction, including without limitation
  12. * the rights to use, copy, modify, merge, publish, distribute, sublicense,
  13. * and/or sell copies of the Software, and to permit persons to whom the
  14. * Software is furnished to do so, subject to the following conditions:
  15. *
  16. * The above copyright notice and this permission notice (including the next
  17. * paragraph) shall be included in all copies or substantial portions of the
  18. * Software.
  19. *
  20. * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  21. * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  22. * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
  23. * PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
  24. * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
  25. * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
  26. * DEALINGS IN THE SOFTWARE.
  27. *
  28. * Authors:
  29. * Gareth Hughes <gareth@valinux.com>
  30. * Kevin E. Martin <martin@valinux.com>
  31. */
  32. #ifndef __R128_DRM_H__
  33. #define __R128_DRM_H__
  34. #include <drm/drm.h>
  35. /* WARNING: If you change any of these defines, make sure to change the
  36. * defines in the X server file (r128_sarea.h)
  37. */
  38. #ifndef __R128_SAREA_DEFINES__
  39. #define __R128_SAREA_DEFINES__
  40. /* What needs to be changed for the current vertex buffer?
  41. */
  42. #define R128_UPLOAD_CONTEXT 0x001
  43. #define R128_UPLOAD_SETUP 0x002
  44. #define R128_UPLOAD_TEX0 0x004
  45. #define R128_UPLOAD_TEX1 0x008
  46. #define R128_UPLOAD_TEX0IMAGES 0x010
  47. #define R128_UPLOAD_TEX1IMAGES 0x020
  48. #define R128_UPLOAD_CORE 0x040
  49. #define R128_UPLOAD_MASKS 0x080
  50. #define R128_UPLOAD_WINDOW 0x100
  51. #define R128_UPLOAD_CLIPRECTS 0x200 /* handled client-side */
  52. #define R128_REQUIRE_QUIESCENCE 0x400
  53. #define R128_UPLOAD_ALL 0x7ff
  54. #define R128_FRONT 0x1
  55. #define R128_BACK 0x2
  56. #define R128_DEPTH 0x4
  57. /* Primitive types
  58. */
  59. #define R128_POINTS 0x1
  60. #define R128_LINES 0x2
  61. #define R128_LINE_STRIP 0x3
  62. #define R128_TRIANGLES 0x4
  63. #define R128_TRIANGLE_FAN 0x5
  64. #define R128_TRIANGLE_STRIP 0x6
  65. /* Vertex/indirect buffer size
  66. */
  67. #define R128_BUFFER_SIZE 16384
  68. /* Byte offsets for indirect buffer data
  69. */
  70. #define R128_INDEX_PRIM_OFFSET 20
  71. #define R128_HOSTDATA_BLIT_OFFSET 32
  72. /* Keep these small for testing.
  73. */
  74. #define R128_NR_SAREA_CLIPRECTS 12
  75. /* There are 2 heaps (local/AGP). Each region within a heap is a
  76. * minimum of 64k, and there are at most 64 of them per heap.
  77. */
  78. #define R128_LOCAL_TEX_HEAP 0
  79. #define R128_AGP_TEX_HEAP 1
  80. #define R128_NR_TEX_HEAPS 2
  81. #define R128_NR_TEX_REGIONS 64
  82. #define R128_LOG_TEX_GRANULARITY 16
  83. #define R128_NR_CONTEXT_REGS 12
  84. #define R128_MAX_TEXTURE_LEVELS 11
  85. #define R128_MAX_TEXTURE_UNITS 2
  86. #endif /* __R128_SAREA_DEFINES__ */
  87. typedef struct {
  88. /* Context state - can be written in one large chunk */
  89. unsigned int dst_pitch_offset_c;
  90. unsigned int dp_gui_master_cntl_c;
  91. unsigned int sc_top_left_c;
  92. unsigned int sc_bottom_right_c;
  93. unsigned int z_offset_c;
  94. unsigned int z_pitch_c;
  95. unsigned int z_sten_cntl_c;
  96. unsigned int tex_cntl_c;
  97. unsigned int misc_3d_state_cntl_reg;
  98. unsigned int texture_clr_cmp_clr_c;
  99. unsigned int texture_clr_cmp_msk_c;
  100. unsigned int fog_color_c;
  101. /* Texture state */
  102. unsigned int tex_size_pitch_c;
  103. unsigned int constant_color_c;
  104. /* Setup state */
  105. unsigned int pm4_vc_fpu_setup;
  106. unsigned int setup_cntl;
  107. /* Mask state */
  108. unsigned int dp_write_mask;
  109. unsigned int sten_ref_mask_c;
  110. unsigned int plane_3d_mask_c;
  111. /* Window state */
  112. unsigned int window_xy_offset;
  113. /* Core state */
  114. unsigned int scale_3d_cntl;
  115. } drm_r128_context_regs_t;
  116. /* Setup registers for each texture unit
  117. */
  118. typedef struct {
  119. unsigned int tex_cntl;
  120. unsigned int tex_combine_cntl;
  121. unsigned int tex_size_pitch;
  122. unsigned int tex_offset[R128_MAX_TEXTURE_LEVELS];
  123. unsigned int tex_border_color;
  124. } drm_r128_texture_regs_t;
  125. typedef struct drm_r128_sarea {
  126. /* The channel for communication of state information to the kernel
  127. * on firing a vertex buffer.
  128. */
  129. drm_r128_context_regs_t context_state;
  130. drm_r128_texture_regs_t tex_state[R128_MAX_TEXTURE_UNITS];
  131. unsigned int dirty;
  132. unsigned int vertsize;
  133. unsigned int vc_format;
  134. /* The current cliprects, or a subset thereof.
  135. */
  136. struct drm_clip_rect boxes[R128_NR_SAREA_CLIPRECTS];
  137. unsigned int nbox;
  138. /* Counters for client-side throttling of rendering clients.
  139. */
  140. unsigned int last_frame;
  141. unsigned int last_dispatch;
  142. struct drm_tex_region tex_list[R128_NR_TEX_HEAPS][R128_NR_TEX_REGIONS + 1];
  143. unsigned int tex_age[R128_NR_TEX_HEAPS];
  144. int ctx_owner;
  145. int pfAllowPageFlip; /* number of 3d windows (0,1,2 or more) */
  146. int pfCurrentPage; /* which buffer is being displayed? */
  147. } drm_r128_sarea_t;
  148. /* WARNING: If you change any of these defines, make sure to change the
  149. * defines in the Xserver file (xf86drmR128.h)
  150. */
  151. /* Rage 128 specific ioctls
  152. * The device specific ioctl range is 0x40 to 0x79.
  153. */
  154. #define DRM_R128_INIT 0x00
  155. #define DRM_R128_CCE_START 0x01
  156. #define DRM_R128_CCE_STOP 0x02
  157. #define DRM_R128_CCE_RESET 0x03
  158. #define DRM_R128_CCE_IDLE 0x04
  159. /* 0x05 not used */
  160. #define DRM_R128_RESET 0x06
  161. #define DRM_R128_SWAP 0x07
  162. #define DRM_R128_CLEAR 0x08
  163. #define DRM_R128_VERTEX 0x09
  164. #define DRM_R128_INDICES 0x0a
  165. #define DRM_R128_BLIT 0x0b
  166. #define DRM_R128_DEPTH 0x0c
  167. #define DRM_R128_STIPPLE 0x0d
  168. /* 0x0e not used */
  169. #define DRM_R128_INDIRECT 0x0f
  170. #define DRM_R128_FULLSCREEN 0x10
  171. #define DRM_R128_CLEAR2 0x11
  172. #define DRM_R128_GETPARAM 0x12
  173. #define DRM_R128_FLIP 0x13
  174. #define DRM_IOCTL_R128_INIT DRM_IOW( DRM_COMMAND_BASE + DRM_R128_INIT, drm_r128_init_t)
  175. #define DRM_IOCTL_R128_CCE_START DRM_IO( DRM_COMMAND_BASE + DRM_R128_CCE_START)
  176. #define DRM_IOCTL_R128_CCE_STOP DRM_IOW( DRM_COMMAND_BASE + DRM_R128_CCE_STOP, drm_r128_cce_stop_t)
  177. #define DRM_IOCTL_R128_CCE_RESET DRM_IO( DRM_COMMAND_BASE + DRM_R128_CCE_RESET)
  178. #define DRM_IOCTL_R128_CCE_IDLE DRM_IO( DRM_COMMAND_BASE + DRM_R128_CCE_IDLE)
  179. /* 0x05 not used */
  180. #define DRM_IOCTL_R128_RESET DRM_IO( DRM_COMMAND_BASE + DRM_R128_RESET)
  181. #define DRM_IOCTL_R128_SWAP DRM_IO( DRM_COMMAND_BASE + DRM_R128_SWAP)
  182. #define DRM_IOCTL_R128_CLEAR DRM_IOW( DRM_COMMAND_BASE + DRM_R128_CLEAR, drm_r128_clear_t)
  183. #define DRM_IOCTL_R128_VERTEX DRM_IOW( DRM_COMMAND_BASE + DRM_R128_VERTEX, drm_r128_vertex_t)
  184. #define DRM_IOCTL_R128_INDICES DRM_IOW( DRM_COMMAND_BASE + DRM_R128_INDICES, drm_r128_indices_t)
  185. #define DRM_IOCTL_R128_BLIT DRM_IOW( DRM_COMMAND_BASE + DRM_R128_BLIT, drm_r128_blit_t)
  186. #define DRM_IOCTL_R128_DEPTH DRM_IOW( DRM_COMMAND_BASE + DRM_R128_DEPTH, drm_r128_depth_t)
  187. #define DRM_IOCTL_R128_STIPPLE DRM_IOW( DRM_COMMAND_BASE + DRM_R128_STIPPLE, drm_r128_stipple_t)
  188. /* 0x0e not used */
  189. #define DRM_IOCTL_R128_INDIRECT DRM_IOWR(DRM_COMMAND_BASE + DRM_R128_INDIRECT, drm_r128_indirect_t)
  190. #define DRM_IOCTL_R128_FULLSCREEN DRM_IOW( DRM_COMMAND_BASE + DRM_R128_FULLSCREEN, drm_r128_fullscreen_t)
  191. #define DRM_IOCTL_R128_CLEAR2 DRM_IOW( DRM_COMMAND_BASE + DRM_R128_CLEAR2, drm_r128_clear2_t)
  192. #define DRM_IOCTL_R128_GETPARAM DRM_IOWR( DRM_COMMAND_BASE + DRM_R128_GETPARAM, drm_r128_getparam_t)
  193. #define DRM_IOCTL_R128_FLIP DRM_IO( DRM_COMMAND_BASE + DRM_R128_FLIP)
  194. typedef struct drm_r128_init {
  195. enum {
  196. R128_INIT_CCE = 0x01,
  197. R128_CLEANUP_CCE = 0x02
  198. } func;
  199. unsigned long sarea_priv_offset;
  200. int is_pci;
  201. int cce_mode;
  202. int cce_secure;
  203. int ring_size;
  204. int usec_timeout;
  205. unsigned int fb_bpp;
  206. unsigned int front_offset, front_pitch;
  207. unsigned int back_offset, back_pitch;
  208. unsigned int depth_bpp;
  209. unsigned int depth_offset, depth_pitch;
  210. unsigned int span_offset;
  211. unsigned long fb_offset;
  212. unsigned long mmio_offset;
  213. unsigned long ring_offset;
  214. unsigned long ring_rptr_offset;
  215. unsigned long buffers_offset;
  216. unsigned long agp_textures_offset;
  217. } drm_r128_init_t;
  218. typedef struct drm_r128_cce_stop {
  219. int flush;
  220. int idle;
  221. } drm_r128_cce_stop_t;
  222. typedef struct drm_r128_clear {
  223. unsigned int flags;
  224. unsigned int clear_color;
  225. unsigned int clear_depth;
  226. unsigned int color_mask;
  227. unsigned int depth_mask;
  228. } drm_r128_clear_t;
  229. typedef struct drm_r128_vertex {
  230. int prim;
  231. int idx; /* Index of vertex buffer */
  232. int count; /* Number of vertices in buffer */
  233. int discard; /* Client finished with buffer? */
  234. } drm_r128_vertex_t;
  235. typedef struct drm_r128_indices {
  236. int prim;
  237. int idx;
  238. int start;
  239. int end;
  240. int discard; /* Client finished with buffer? */
  241. } drm_r128_indices_t;
  242. typedef struct drm_r128_blit {
  243. int idx;
  244. int pitch;
  245. int offset;
  246. int format;
  247. unsigned short x, y;
  248. unsigned short width, height;
  249. } drm_r128_blit_t;
  250. typedef struct drm_r128_depth {
  251. enum {
  252. R128_WRITE_SPAN = 0x01,
  253. R128_WRITE_PIXELS = 0x02,
  254. R128_READ_SPAN = 0x03,
  255. R128_READ_PIXELS = 0x04
  256. } func;
  257. int n;
  258. int *x;
  259. int *y;
  260. unsigned int *buffer;
  261. unsigned char *mask;
  262. } drm_r128_depth_t;
  263. typedef struct drm_r128_stipple {
  264. unsigned int *mask;
  265. } drm_r128_stipple_t;
  266. typedef struct drm_r128_indirect {
  267. int idx;
  268. int start;
  269. int end;
  270. int discard;
  271. } drm_r128_indirect_t;
  272. typedef struct drm_r128_fullscreen {
  273. enum {
  274. R128_INIT_FULLSCREEN = 0x01,
  275. R128_CLEANUP_FULLSCREEN = 0x02
  276. } func;
  277. } drm_r128_fullscreen_t;
  278. /* 2.3: An ioctl to get parameters that aren't available to the 3d
  279. * client any other way.
  280. */
  281. #define R128_PARAM_IRQ_NR 1
  282. typedef struct drm_r128_getparam {
  283. int param;
  284. void *value;
  285. } drm_r128_getparam_t;
  286. #endif